bugmake - Bugs: bug #30505, Make doesn't update the entire...

 
 

bug #30505: Make doesn't update the entire dependency chain?

Submitter:  Geoff Lywood <glywood>
Submitted:  Wed 21 Jul 2010 07:43:12 AM UTC
   
 
Severity:  3 - Normal Item Group:  Bug
Status:  Fixed Privacy:  Public
Assigned to:  psmith Open/Closed:  Closed
Component Version:  3.81 Operating System:  POSIX-Based
Fixed Release:  4.0 Triage Status:  None
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Sun 04 Mar 2012 06:48:41 AM UTC, comment #1: 

I can reproduce this behavior in both GNU make 3.81 and 3.82, but in the current CVS version of make the target is rebuilt every time.  My suspicion is that in earlier versions it's related to timestamps.  When you run make continuously like that it can complete all commands in <1s.  Since make uses time last modified stamps to determine whether things have changed, if all the files have the same timestamp even after they're changed then make doesn't realize they've really been updated.

However, I think in newer versions of make the effect of .PHONY is being propagated up; it used to cause test.o to always be updated but test was only updated if timestamps required it.

Anyway I'm marking this fixed.

Paul D. Smith <psmith>
Group administrator
Wed 21 Jul 2010 07:43:12 AM UTC, original submission:  

I have found a case where 'make' will update a target, and then fail to update things that depend on that target.

Consider the following Makefile (also attached in case the indentation gets messed up):

all: test

PREVIOUS_VAR := $(shell cat previous_var)

ifneq ($(PREVIOUS_VAR),$(VAR))
previous_var:
echo $(VAR) > previous_var
.PHONY: previous_var
endif

test: test.o
$(LD) -o test test.o

test.o: test.c previous_var
$(CC) -o test.o test.c

As you can see, the Makefile attempts to remember the value of VAR= that was passed in on the command line, and rebuild the 'test' program whenever the value changes.

Now, lets try it out:

/source/test $ make VAR=abc
cat: previous_var: No such file or directory
echo abc > previous_var
cc -o test.o test.c
ld -o test test.o
/source/test $ make VAR=abc
make: Nothing to be done for `all'.
/source/test $ make VAR=def
echo def > previous_var
cc -o test.o test.c
ld -o test test.o

All is looking good so far. However:

/source/test $ while true ; do make VAR=abc ; make VAR=def ; done
echo abc > previous_var
cc -o test.o test.c
ld -o test test.o
echo def > previous_var
cc -o test.o test.c
echo abc > previous_var
cc -o test.o test.c
echo def > previous_var
cc -o test.o test.c
echo abc > previous_var
cc -o test.o test.c
^C

What happened to the link step? Why isn't it being executed anymore? Lets look at the debug output:

    Must remake target `test.o'.
cc -o test.o test.c
Putting child 0x018f3120 (test.o) PID 3074 on the chain.
Live child 0x018f3120 (test.o) PID 3074
Reaping winning child 0x018f3120 PID 3074
Removing child 0x018f3120 PID 3074 from chain.
    Successfully remade target file `test.o'.
   Finished prerequisites of target file `test'.
   Prerequisite `test.o' is older than target `test'.
  No need to remake target `test'.

How can 'test.o' possibly be older than 'test'? 'test.o' just got rebuilt! It's the newest thing on the entire system.

Geoff Lywood <glywood>

 

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Attached Files
file #21019:  Makefile added by glywood (243B - application/octet-stream)

 

Depends on the following items: None found

Items that depend on this one: None found

 

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    Follow 5 latest changes.

    Date Changed by Updated Field Previous Value => Replaced by
    2012-03-04 psmith StatusNone Fixed
        Assigned toNone psmith
        Open/ClosedOpen Closed
        Fixed ReleaseNone 4.0
    2010-07-21 glywood Attached File- Added Makefile, #21019

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