bugmake - Bugs: bug #17883, target-specific variables prevent...

 
 

bug #17883: target-specific variables prevent builtin rules

Submitted by:  None
Submitted on:  Fri 29 Sep 2006 08:30:01 AM UTC  
 
Severity:  3 - Normal Item Group:  Bug
Status:  Not A Bug Privacy:  Public
Assigned to:  None Open/Closed:  Closed
Component Version:  3.81 Operating System:  POSIX-Based
Fixed Release:  None Triage Status:  None

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Sat 30 Sep 2006 08:59:24 PM UTC, comment #2: 

As Philip points out, you cannot use target-specific variables in the prerequisites list of a target.  I'm closing this: add a note if you have further comments.

Paul D. Smith <psmith>
Project Administrator
Fri 29 Sep 2006 09:52:39 AM UTC, comment #1: 

To quote the info pages, section 6.10 "Target-specific Variable Values":

    As with automatic variables, these values are only available
    within the context of a target's command script (and in other
    target-specific assignments).

That is, they are normally not available in the prerequisite list for the target; the global value will be expanded there.

Solutions:
1) use the .SECONDEXPANSION magic target and use $$(objs) in the
   prerequisite lists.  Other makefile changes might be
   necessary when .SECONDEXPANSION is used.  Check the info pages
   for details of usage.

2) drop the target-specific variables, declare the dependencies
   directly or using multiple global varibles (ala $(prog1_objs),
   etc), and then use $(filter %.o,$^) in the command instead of
   $(objs).

Philip Guenther

Anonymous
Fri 29 Sep 2006 08:30:01 AM UTC, original submission:  

Hello,

I want to use a Makefile for creating MORE THAN ONE executables from binary objects from C source files; but each executable has different object files on which it depends; therefore, instead of a global $(objs) variable (which works if it were exactly ONE executable, and no target-specific variable were needed) , I declare a target-specific variable of enumerated object files; then I instantiate $(objs) in the target prerequisites, possible before OTHER prerequisites - like "Makefile" -, and call the ${CC} compiler with $(objs) arguments; but it DOES NOT trigger the builtin rules for %.o targets.

Anonymous

 

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Attach Files:
   
   
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Attached Files
file #10868:  Makefile added by None (2KiB - application/octet-stream - a sample Makefile)

 

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Follow 3 latest changes.

Date Changed by Updated Field Previous Value => Replaced by
2006-09-30 psmith StatusNone => Not A Bug
    Open/ClosedOpen => Closed
2006-09-29 None Attached File- => Added Makefile, #10868

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