bugmake - Bugs: bug #56778, 'define' ... 'endef' serializes...

 
 

bug #56778: 'define' ... 'endef' serializes sub-make invocations

Submitter:  Masahiro Yamada <masahiroy>
Submitted:  Tue 20 Aug 2019 04:31:17 AM UTC
   
 
Severity:  3 - Normal Item Group:  None
Status:  Not A Bug Privacy:  Public
Assigned to:  None Open/Closed:  Closed
Component Version:  None Operating System:  None
Fixed Release:  None Triage Status:  None
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Tue 20 Aug 2019 05:17:56 AM UTC, comment #1: 

Questions like this about how make works are best asked on the mailing lists, such as -email is unavailable- or help-make@gnu.org, rather than being reported as bugs in the bug tracker.

This is expected behavior.  The details of why this happens are described in https://www.gnu.org/software/make/manual/html_node/MAKE-Variable.html and look up this error in the section https://www.gnu.org/software/make/manual/html_node/Error-Messages.html

Basically in Makefile4 you have a rule like this:


all:
        $(my_rule)


the string $(my_rule) doesn't have an immediate reference to the $(MAKE) variable so as far as make is concerned, this recipe does not invoke a recursive make instance.

To tell make that it does perform a recursive make instance, and thus avoid the warning, you need to use the special + character.  You can either prefix the variable reference in the recipe, like this:


all:
        +$(my_rule)


Or include it inside the define like this:


define my_rule
  +$(MAKE) -f $(lastword $(MAKEFILE_LIST)) SUB-MAKE=1 hello
endef


(note the TAB is not needed here because you already have a TAB before the recipe where the $(my_rule) variable appears... you can include it or not it doesn't matter).

Paul D. Smith <psmith>
Group administrator
Tue 20 Aug 2019 04:31:17 AM UTC, original submission:  

I think 'define' ... 'endef' is useful
to macrofy a long recipe and to re-use it
in other places.

I attached 4 simple Makefile examples.

"make -f Makefile1" and "make -f Makefile2"
work equivalently for me.

However, Makefile3 and Makefile4 gave me
different results if a parallel build option
is given.

"make -j8 -f Makefile3" is fine, but
"make -j8 -f Makefile4" shows
warning: jobserver unavailable: using -j1.  Add '+' to parent make rule.

So, if a macro contains invocations of sub-make,
it turns off parallel building for sub-make.

Is this a specification?
I just wondered why Makefile3 and Makefile4
work differently.

Masahiro Yamada <masahiroy>

 

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Attach Files:
   
   
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Attached Files
file #47366:  Makefile1 added by masahiroy (43B - application/octet-stream)
file #47367:  Makefile2 added by masahiroy (77B - application/octet-stream)
file #47368:  Makefile3 added by masahiroy (141B - application/octet-stream)
file #47369:  Makefile4 added by masahiroy (175B - application/octet-stream)

 

Depends on the following items: None found

Items that depend on this one: None found

 

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    Follow 6 latest changes.

    Date Changed by Updated Field Previous Value => Replaced by
    2019-08-20 psmith StatusNone Not A Bug
        Open/ClosedOpen Closed
    2019-08-20 masahiroy Attached File- Added Makefile1, #47366
        Attached File- Added Makefile2, #47367
        Attached File- Added Makefile3, #47368
        Attached File- Added Makefile4, #47369

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