JIT_OP_BR_IFALSE: spill_before [imm] -> { if(!$1) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, 0); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [reg] -> { x86_alu_reg_reg(inst, X86_OR, $1, $1); inst = output_branch(func, inst, 0x74 /* eq */, insn); } JIT_OP_BR_ITRUE: binary_branch [imm] -> { if($1) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, 0); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [reg] -> { x86_alu_reg_reg(inst, X86_OR, $1, $1); inst = output_branch(func, inst, 0x75 /* ne */, insn); } JIT_OP_BR_IEQ: binary_branch [imm, imm] -> { if($1==$2) { inst = output_branch(func, inst, 0xEB /* jmp */, insn); } } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [imm, reg] -> { if(!$1) x86_alu_reg_reg(inst, X86_OR, $2, $2); else x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [reg, imm] -> { if(!$2) x86_alu_reg_reg(inst, X86_OR, $1, $1); else x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x74 /* eq */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x74 /* eq */, insn); } JIT_OP_BR_INE: binary_branch [imm, imm] -> { if($1 != $2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [imm, reg] -> { if(!$1) x86_alu_reg_reg(inst, X86_OR, $2, $2); else x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [reg, imm] -> { if(!$2) x86_alu_reg_reg(inst, X86_OR, $1, $1); else x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } JIT_OP_BR_ILT: binary_branch [imm, imm] -> { if((jit_int)$1 < (jit_int)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7C /* lt */, insn); } JIT_OP_BR_ILT_UN: binary_branch [imm, imm] -> { if((jit_uint)$1 < (jit_uint)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } JIT_OP_BR_ILE: binary_branch [imm, imm] -> { if((jit_int)$1 <= (jit_int)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7E /* le */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7E /* le */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7E /* le */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x7E /* le */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7E /* le */, insn); } JIT_OP_BR_ILE_UN: binary_branch [imm, imm] -> { if((jit_uint)$1 <= (jit_uint)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } JIT_OP_BR_IGT: binary_branch [imm, imm] -> { if((jit_int)$1 > (jit_int)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x7C /* lt */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x7F /* gt */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7F /* gt */, insn); } JIT_OP_BR_IGT_UN: binary_branch [imm, imm] -> { if((jit_uint)$1 > (jit_uint)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); } JIT_OP_BR_IGE: binary_branch [imm, imm] -> { if((jit_int)$1 >= (jit_int)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x7E /* le */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x7E /* le */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x7D /* ge */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x7D /* ge */, insn); } JIT_OP_BR_IGE_UN: binary_branch [imm, imm] -> { if((jit_uint)$1 >= (jit_uint)$2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); } [local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } [reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } JIT_OP_BR_LFALSE: binary_branch [imm] -> { jit_long value = ((jit_long *)($1))[0]; if(!value) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [local] -> { unsigned char *patch; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, 0); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, 0); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_OR, $1, $1); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_OR, %1, %1); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } JIT_OP_BR_LTRUE: binary_branch [imm] -> { jit_long value = ((jit_long *)($1))[0]; if(value) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, 0); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, 0); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [lreg] -> { x86_alu_reg_reg(inst, X86_OR, $1, $1); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_reg_reg(inst, X86_OR, %1, %1); inst = output_branch(func, inst, 0x75 /* ne */, insn); } JIT_OP_BR_LEQ: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 == value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, $2, value1); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, $1, value1); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, $1, $2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x74 /* eq */, insn); x86_patch(patch, inst); } JIT_OP_BR_LNE: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 != value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [imm, lreg] -> { jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [local, imm] -> { jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [local, lreg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [lreg, imm] -> { jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [lreg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x75 /* ne */, insn); } [lreg, lreg] -> { x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x75 /* ne */, insn); x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x75 /* ne */, insn); } JIT_OP_BR_LLT: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 < value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LLT_UN: binary_branch [imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($1))[0]; jit_ulong value2 = ((jit_ulong *)($2))[0]; if(value1 < value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LLE: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 <= value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LLE_UN: binary_branch [imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($1))[0]; jit_ulong value2 = ((jit_ulong *)($2))[0]; if(value1 <= value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x7F /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x7F /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LGT: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 > value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LGT_UN: binary_branch [imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($1))[0]; jit_ulong value2 = ((jit_ulong *)($2))[0]; if(value1 > value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LGE: binary_branch [imm, imm] -> { jit_long value1 = ((jit_long *)($1))[0]; jit_long value2 = ((jit_long *)($2))[0]; if(value1 >= value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x7C /* lt */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x7F /* gt */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } JIT_OP_BR_LGE_UN: binary_branch [imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($1))[0]; jit_ulong value2 = ((jit_ulong *)($2))[0]; if(value1 >= value2) inst = output_branch(func, inst, 0xEB /* jmp */, insn); } [imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($1))[0]; jit_uint value2 = ((jit_uint *)($1))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [imm, lreg] -> { unsigned char *patch; jit_int value1 = ((jit_int *)($1))[0]; jit_int value2 = ((jit_int *)($1))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); inst = output_branch(func, inst, 0x72 /* lt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_GT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = output_branch(func, inst, 0x76 /* le_un */, insn); x86_patch(patch, inst); } [local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1 + 4, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $1, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1 + 4, %2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %1, value2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $1, value1); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %1, X86_EBP, $2 + 4); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } [lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %1, %2); inst = output_branch(func, inst, 0x77 /* gt_un */, insn); patch = inst; x86_branch8(inst, X86_CC_LT, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $1, $2); inst = output_branch(func, inst, 0x73 /* ge_un */, insn); x86_patch(patch, inst); } /* * Comparison opcodes. */ JIT_OP_IEQ: [=reg, imm, imm] -> { if($2 == $3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, imm, reg] -> { if(!$2) x86_alu_reg_reg(inst, X86_OR, $3, $3); else x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, imm] -> { if(!$3) x86_alu_reg_reg(inst, X86_OR, $2, $2); else x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $2, X86_CC_EQ, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, imm] -> { if(!$3) x86_alu_reg_reg(inst, X86_OR, $2, $2); else x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $2, X86_CC_EQ, 0); } JIT_OP_INE: [=reg, imm, imm] -> { if($2 != $3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, imm, reg] -> { if(!$2) x86_alu_reg_imm(inst, X86_CMP, $3, $2); else x86_alu_reg_reg(inst, X86_OR, $3, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, reg, imm] -> { if(!$3) x86_alu_reg_reg(inst, X86_OR, $2, $2); else x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $2, X86_CC_NE, 0); } JIT_OP_ILT: [=reg, imm, imm] -> { if((jit_int)$2 < (jit_int)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } JIT_OP_ILT_UN: [=reg, imm, imm] -> { if((jit_uint)$2 < (jit_uint)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } JIT_OP_ILE: [=reg, imm, imm] -> { if((jit_int)$2 <= (jit_int)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } JIT_OP_ILE_UN: [=reg, imm, imm] -> { if((jit_uint)$2 <= (jit_uint)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } JIT_OP_IGT: [=reg, imm, imm] -> { if((jit_int)$2 > (jit_int)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } JIT_OP_IGT_UN: [=reg, imm, imm] -> { if((jit_uint)$2 > (jit_uint)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } JIT_OP_IGE: [=reg, imm, imm] -> { if($2 >= $3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $2, X86_CC_GE, 1); } JIT_OP_IGE_UN: [=reg, imm, imm] -> { if((jit_uint)$2 >= (jit_uint)$3) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, imm, reg] -> { x86_alu_reg_imm(inst, X86_CMP, $3, $2); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, local, imm] -> { x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, local, reg] -> { x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, reg, imm] -> { x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, reg, local] -> { x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, reg, reg] -> { x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } JIT_OP_LEQ: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 == value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } JIT_OP_LNE: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 != value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_int value1 = ((jit_int *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_int value1 = ((jit_int *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } JIT_OP_LLT: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 < value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } [=reg, imm, lreg] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } [=reg, local, imm] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } [=reg, local, lreg] -> { unsigned char *patch1, *patch2; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } [=reg, lreg, imm] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } [=reg, lreg, local] -> { unsigned char *patch1, *patch2; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } [=reg, lreg, lreg] -> { unsigned char *patch1, *patch2; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } JIT_OP_LLT_UN: [=reg, imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($2))[0]; jit_ulong value2 = ((jit_ulong *)($3))[0]; if(value1 < value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } JIT_OP_LLE: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 <= value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } [=reg, imm, lreg] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } [=reg, local, imm] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_BE, 1); x86_patch(patch2, inst); } [=reg, local, lreg] -> { unsigned char *patch1, *patch2; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_BE, 1); x86_patch(patch2, inst); } [=reg, lreg, imm] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_BE, 1); x86_patch(patch2, inst); } [=reg, lreg, local] -> { unsigned char *patch1, *patch2; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_BE, 1); x86_patch(patch2, inst); } [=reg, lreg, lreg] -> { unsigned char *patch1, *patch2; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_BE, 1); x86_patch(patch2, inst); } JIT_OP_LLE_UN: [=reg, imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($2))[0]; jit_ulong value2 = ((jit_ulong *)($3))[0]; if(value1 <= value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } JIT_OP_LGT: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 > value2) x86_mov_reg_imm(inst, $1, 1); else x86_clear_reg(inst, $1); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LT, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_EQ, 0, 1); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch, inst); } [=reg, imm, lreg] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_LT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 1); x86_patch(patch2, inst); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_GT, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_EQ, 0, 1); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch, inst); } [=reg, local, lreg] -> { unsigned char *patch1, *patch2; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } [=reg, lreg, imm] -> { jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; unsigned char *patch1, *patch2; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } [=reg, lreg, local] -> { unsigned char *patch1, *patch2; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } [=reg, lreg, lreg] -> { unsigned char *patch1, *patch2; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 1); x86_patch(patch2, inst); } JIT_OP_LGT_UN: [=reg, imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($2))[0]; jit_ulong value2 = ((jit_ulong *)($3))[0]; if(value1 > value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, lreg, local] -> { unsigned char *patch;; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } JIT_OP_LGE: [=reg, imm, imm] -> { jit_long value1 = ((jit_long *)($2))[0]; jit_long value2 = ((jit_long *)($3))[0]; if(value1 >= value2) x86_mov_reg_imm(inst, $1, 1); else x86_clear_reg(inst, $1); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_LE, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_EQ, 0, 1); inst = setcc_reg(inst, $1, X86_CC_LE, 1); x86_patch(patch, inst); } [=reg, imm, lreg] -> { unsigned char *patch1, *patch2; jit_uint value1 = ((jit_uint *)($2))[0]; jit_int value2 = ((jit_int *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $3, value1); inst = setcc_reg(inst, $1, X86_CC_LE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 1); x86_patch(patch2, inst); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_GE, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_EQ, 0, 1); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch, inst); } [=reg, local, lreg] -> { unsigned char *patch1, *patch2; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } [=reg, lreg, imm] -> { jit_uint value1 = ((jit_uint *)($3))[0]; jit_int value2 = ((jit_int *)($3))[1]; unsigned char *patch1, *patch2; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_imm(inst, X86_CMP, $2, value1); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } [=reg, lreg, local] -> { unsigned char *patch1, *patch2; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } [=reg, lreg, lreg] -> { unsigned char *patch1, *patch2; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch1 = inst; x86_branch8(inst, X86_CC_NE, 0, 1); x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); patch2 = inst; x86_jump8(inst, 0); x86_patch(patch1, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 1); x86_patch(patch2, inst); } JIT_OP_LGE_UN: [=reg, imm, imm] -> { jit_ulong value1 = ((jit_ulong *)($2))[0]; jit_ulong value2 = ((jit_ulong *)($3))[0]; if(value1 >= value2) x86_mov_reg_imm(inst, $1, 1); else x86_mov_reg_imm(inst, $1, 0); } [=reg, imm, local] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, imm, lreg] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($2))[0]; jit_uint value2 = ((jit_uint *)($2))[1]; x86_alu_reg_imm(inst, X86_CMP, %3, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $3, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } [=reg, local, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2 + 4, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_imm(inst, X86_CMP, X86_EBP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, local, lreg] -> { unsigned char *patch; x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2 + 4, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_membase_reg(inst, X86_CMP, X86_EBP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, lreg, imm] -> { unsigned char *patch; jit_uint value1 = ((jit_uint *)($3))[0]; jit_uint value2 = ((jit_uint *)($3))[1]; x86_alu_reg_imm(inst, X86_CMP, %2, value2); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_imm(inst, X86_CMP, $2, value1); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, lreg, local] -> { unsigned char *patch; x86_alu_reg_membase(inst, X86_CMP, %2, X86_EBP, $3 + 4); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } [=reg, lreg, lreg] -> { unsigned char *patch; x86_alu_reg_reg(inst, X86_CMP, %2, %3); patch = inst; x86_branch8(inst, X86_CC_NE, 0, 0); x86_alu_reg_reg(inst, X86_CMP, $2, $3); x86_patch(patch, inst); inst = setcc_reg(inst, $1, X86_CC_GE, 0); }