bugmake - Bugs: bug #23928, Add MAKEFILE variable

 
 

bug #23928: Add MAKEFILE variable

Submitted by:  None
Submitted on:  Thu 24 Jul 2008 01:35:46 PM UTC  
 
Severity: 3 - NormalItem Group: Enhancement
Status: Not A BugPrivacy: Public
Assigned to: NoneOpen/Closed: Closed
Component Version: 3.81Operating System: None
Fixed Release: NoneTriage Status: None

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Sun 29 Jan 2012 06:21:45 PM UTC, comment #4:

I believe this is already possible with $(MAKEFILE_LIST) if it's used in the right place, although it's not always perfect. Please add comments with use-cases which are very difficult or not possible.

Remember that there are a LOT of possibilities; for example how do you handle the case where the user runs "make -f F1 -f F2 -f F3"? Etc. Any request for such an enhancement needs to carefully describe what the expected behavior would be in all these situations.

Paul D. Smith <psmith>
Project Administrator
Sat 26 Jul 2008 06:44:18 AM UTC, comment #3:

Icarus Sparry wrote:

> You probably want lastword, rather than firstword.


Nope. To quote the original request:

> It is often useful to recursively call the current makefile
> as part of a rule. Sometimes rules are included from a
> different file. The included file may not know the name of
> the make file used to start the make process.


The request was for the name of "the make file used to start the make process", which would be $(firstword ${MAKEFILE_LIST}).

(The use of the phrase "current makefile" is slightly ambiguous, but I think the last sentence makes it clear that it is meant to refer to the makefile that started the whole deal.)

BTW, $(lastword ${MAKEFILE_LIST}) is not always the makefile being parsed at that moment, particularly when there's an 'include' directive earlier in the makefile. There's in fact no 100% general and reliable way to get the name of the file that's being parsed.

Philip Guenther

Anonymous
Fri 25 Jul 2008 08:58:49 PM UTC, comment #2:

You probably want lastword, rather than firstword.

Icarus Sparry <icarus>
Thu 24 Jul 2008 03:26:19 PM UTC, comment #1:

Simply add this to rules.mk and you're done:

MAKEFILE = $(firstword $(MAKEFILE_LIST))

Martin Dorey <mdorey>
Thu 24 Jul 2008 01:35:46 PM UTC, original submission:

It is often useful to recursively call the current makefile as
part of a rule. Sometimes rules are included from a different file. The included file may not know the name of the make file used to start the make process. Having a MAKEFILE variable would solve this.

File rules.mk:
---------------
foo:
make -f $(MAKEFILE) bar

bar:
echo hello
----------------

File GNUmakefile:
-----------------
include rules.mk

File Test.mk:
-----------------
include rules.mk

Anonymous

 

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  • -unavailable- added by psmith (Posted a comment)
  • -unavailable- added by icarus (Posted a comment)
  • -unavailable- added by mdorey (Posted a comment)
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    Follow 2 latest changes.

    Date Changed By Updated Field Previous Value => Replaced By
    Sun 29 Jan 2012 06:21:45 PM UTCpsmithStatusNone=>Not A Bug
      Open/ClosedOpen=>Closed

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