Index: at4433.cpp
===================================================================
--- at4433.cpp	(revision 857)
+++ at4433.cpp	(working copy)
@@ -53,7 +53,7 @@
 
 	irqSystem = new HWIrqSystem(this, 2);
 	eeprom= new HWMegaEeprom(this, irqSystem, 256, 12); //we use a eeprom with irq here
-	stack = new HWStack(this, Sram, 0x00ff);
+	stack = new HWStack(this, 0x00ff);
 
 	portb= new HWPort(this, "B");
 	portc= new HWPort(this, "C");
Index: at8515.cpp
===================================================================
--- at8515.cpp	(revision 857)
+++ at8515.cpp	(working copy)
@@ -44,7 +44,7 @@
     eeprom= new HWEeprom(this, 512);
 
 	irqSystem = new HWIrqSystem(this, 2);
-	stack = new HWStack(this, Sram, 0xffff);
+	stack = new HWStack(this, 0xffff);
 
 	porta= new HWPort(this, "A");
 	portb= new HWPort(this, "B");
Index: atmega128.cpp
===================================================================
--- atmega128.cpp	(revision 852)
+++ atmega128.cpp	(working copy)
@@ -78,7 +78,7 @@
 {
 	irqSystem = new HWIrqSystem(this, 4); //4 bytes per vector
 	eeprom = new HWMegaEeprom(this, irqSystem, 4096, 22); 
-	stack = new HWStack(this, Sram, 0xffff);
+	stack = new HWStack(this, 0xffff);
 	porta= new HWPort(this, "A");
 	portb= new HWPort(this, "B");
 	portc= new HWPort(this, "C");
Index: atmega48.cpp
===================================================================
--- atmega48.cpp	(revision 857)
+++ atmega48.cpp	(working copy)
@@ -76,7 +76,7 @@
 	irqSystem	= new HWIrqSystem(this,2);
 
     eeprom = new HWMegaEeprom( this, irqSystem, 256, 23); 
-	stack = new HWStack(this, Sram, 0xffff);
+	stack = new HWStack(this, 0xffff);
 
 	RegisterPin("AREF", &aref);
 	RegisterPin("ADC6", &adc6);
Index: avrdevice.cpp
===================================================================
--- avrdevice.cpp	(revision 854)
+++ avrdevice.cpp	(working copy)
@@ -278,6 +278,56 @@
 }
 
 
+byte AvrDevice::ReadReg  (unsigned int addr) const
+{
+	assert(addr < 32);
+	RWMemoryMembers & membyte(R->operator[](addr));
+	return (unsigned) membyte;
+}
+void AvrDevice::WriteReg (unsigned int addr, byte val)
+{
+	assert(addr < 32);
+	RWMemoryMembers & membyte(R->operator[](addr));
+	membyte = val;
+}
+byte AvrDevice::ReadIO   (unsigned int addr) const
+{
+	assert(0 <= addr && addr < ioSpaceSize);  // callers do not use the 0x20 base
+	RWMemoryMembers & membyte(ioreg->operator[](addr));
+	return (unsigned) membyte;
+}
+void AvrDevice::WriteIO  (unsigned int addr, byte val)
+{
+	assert(0 <= addr && addr < ioSpaceSize);  // callers do not use the 0x20 base
+	RWMemoryMembers & membyte(ioreg->operator[](addr));
+	membyte = val;
+}
+byte AvrDevice::ReadSram (unsigned int addr) const
+{
+	assert(addr <= totalIoSpace);
+	RWMemoryMembers & membyte(Sram->operator[](addr));
+	return (unsigned) membyte;
+}
+void AvrDevice::WriteSram(unsigned int addr, byte val)
+{
+	assert(addr <= totalIoSpace);
+	RWMemoryMembers & membyte(Sram->operator[](addr));
+	membyte = val;
+}
+word AvrDevice::ReadRegX() const
+{
+    return (ReadReg(27) << 8) + ReadReg(26);
+}
+word AvrDevice::ReadRegY() const
+{
+    return (ReadReg(29) << 8) + ReadReg(28);
+}
+word AvrDevice::ReadRegZ() const
+{
+    return (ReadReg(31) << 8) + ReadReg(30);
+}
+
+
 //do a single core step, (0)->a real hardware step, (1) until the uC finish the opcode! 
 int AvrDevice::Step(bool &untilCoreStepFinished, SystemClockOffset *nextStepIn_ns) {
    if (trace_on==1) {
Index: avrdevice.h
===================================================================
--- avrdevice.h	(revision 852)
+++ avrdevice.h	(working copy)
@@ -54,7 +54,7 @@
         map < string, Pin *> allPins; 
         unsigned int ioSpaceSize;
 
-        //old static vars for Step()
+        /// Count of cycles before next instruction is executed (i.e. countdown)
         int cpuCycles;
         unsigned int newIrqPc;
         unsigned int actualIrqVector;
@@ -77,6 +77,15 @@
         MemoryOffsets *R;
         MemoryOffsets *ioreg;
 		RWMemoryMembers **rw;  ///< The whole memory: R0-R31, IO, Internal RAM.
+		byte ReadReg  (unsigned int addr) const;
+		void WriteReg (unsigned int addr, byte val);
+		byte ReadIO   (unsigned int addr) const;
+		void WriteIO  (unsigned int addr, byte val);
+		byte ReadSram (unsigned int addr) const;
+		void WriteSram(unsigned int addr, byte val);
+        word ReadRegX() const;
+        word ReadRegY() const;
+        word ReadRegZ() const;
 
         HWStack *stack;
         HWSreg *status;
Index: decoder.cpp
===================================================================
--- decoder.cpp	(revision 852)
+++ decoder.cpp	(working copy)
@@ -108,13 +108,15 @@
 int funyFunc(int x) { return 0; }
 
 avr_op_ADC::avr_op_ADC(word opcode, AvrDevice *c) : 
-    DecodedInstruction(c, get_rd_5(opcode),get_rr_5(opcode)), R1(((*(c->R))[get_rd_5(opcode)])), R2(((*(c->R))[get_rr_5(opcode)])), 
+    DecodedInstruction(c, get_rd_5(opcode),get_rr_5(opcode)),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status)
 { }
 
 int avr_op_ADC::operator()() { 
-    unsigned char rd=R1;
-    unsigned char rr=R2;
+    unsigned char rd = core->ReadReg(R1);
+    unsigned char rr = core->ReadReg(R2);
     unsigned char res = rd + rr + status->C;
 
     status->H = get_add_carry( res, rd, rr, 3 ) ;
@@ -124,21 +126,20 @@
     status->Z = ((res & 0xff) == 0)             ;
     status->C = get_add_carry( res, rd, rr, 7 ) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;   //used clocks
 }
 
 avr_op_ADD::avr_op_ADD(word opcode, AvrDevice *c) : 
     DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1(((*(c->R))[get_rd_5(opcode)])),
-    R2(((*(c->R))[get_rr_5(opcode)])), 
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status)
 { }
 
 int avr_op_ADD::operator()() { 
-    unsigned char rd=R1;
-    unsigned char rr=R2;
+    unsigned char rd = core->ReadReg(R1);
+    unsigned char rr = core->ReadReg(R2);
     unsigned char res = rd + rr ;
 
     status->H = get_add_carry( res, rd, rr, 3 ) ;
@@ -148,73 +149,63 @@
     status->Z = ((res & 0xff) == 0)             ;
     status->C = get_add_carry( res, rd, rr, 7 ) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;   //used clocks
 }
 
 avr_op_ADIW::avr_op_ADIW(word opcode, AvrDevice *c): 
-    DecodedInstruction(c, get_K_6(opcode),  get_rd_2(opcode)),
-    Rl( (*(core->R))[get_rd_2(opcode)]),
-    Rh( (*(core->R))[get_rd_2(opcode)+1]),
+    DecodedInstruction(c, 0, 0),
+    Rl(get_rd_2(opcode)),
+    Rh(get_rd_2(opcode)+1),
     K(get_K_6(opcode)),
     status(c->status) {
     }
 
 int avr_op_ADIW::operator()() {
-    word rd = (Rh << 8) + Rl;
+    word rd = (core->ReadReg(Rh) << 8) + core->ReadReg(Rl);
     word res = rd + K;
 
-    unsigned char rdh= Rh;
+    unsigned char rdh = core->ReadReg(Rh);
 
-
     status->V = (~(rdh >> 7 & 0x1) & (res >> 15 & 0x1)) ; 
     status->N = ((res >> 15) & 0x1)                     ;
     status->S = (status->N ^ status->V)                                 ;
     status->Z = ((res & 0xffff) == 0)                   ;
     status->C = (~(res >> 15 & 0x1) & (rdh >> 7 & 0x1)) ; 
 
-    Rl= res &0xff;
-    Rh= res>>8;
-
+	core->WriteReg(Rl, res & 0xff);
+	core->WriteReg(Rh, res>>8);
     return 2; 
 }
 
 avr_op_AND::avr_op_AND(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) {}
 
+int avr_op_AND::operator()() {
+        byte res = core->ReadReg(R1) & core->ReadReg(R2);
 
-    int avr_op_AND::operator()() {
-
-        byte res = R1 & R2;
-
-
         status->V = 0                   ;
         status->N = ((res >> 7) & 0x1)  ; 
         status->S = (status->N ^ status->V)             ;
         status->Z = ((res & 0xff) == 0) ; 
 
-        R1= res;
-
-
-
+        core->WriteReg(R1, res);
         return 1; 
-    }
+}
 
-avr_op_ANDI::avr_op_ANDI
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode), get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+avr_op_ANDI::avr_op_ANDI(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_4(opcode)),
     status(core->status) ,
     K(get_K_8(opcode))
 {}
 
 int avr_op_ANDI::operator()() 
 {
-    byte rd = R1;
+    byte rd = core->ReadReg(R1);
     byte res = rd & K;
 
     status->V = 0                   ;
@@ -222,20 +213,19 @@
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ; 
 
-    R1=res;
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_ASR::avr_op_ASR
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
+avr_op_ASR::avr_op_ASR(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_ASR::operator()() 
 {
-    byte rd = R1; 
+    byte rd = core->ReadReg(R1); 
     byte res = (rd >> 1) + (rd & 0x80);
 
     status->N = ((res >> 7) & 0x1) ;
@@ -244,56 +234,47 @@
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
 
-    R1=res;
-
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
-avr_op_BCLR::avr_op_BCLR
-(word opcode, AvrDevice *c):
+avr_op_BCLR::avr_op_BCLR(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_sreg_bit(opcode),0),
     status(core->status) ,
-    K(~(1<<get_sreg_bit(opcode)))
+    Kbit(get_sreg_bit(opcode))
 {}
 
 int avr_op_BCLR::operator()() 
 {
     //(*status)&=K;
-    *status= (*status)&K;
+    *status= (*status) & ~(1 << Kbit);
     return 1;
 }
 
-avr_op_BLD::avr_op_BLD
-(word opcode, AvrDevice *c):
+avr_op_BLD::avr_op_BLD(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_reg_bit(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Kadd(1<<get_reg_bit(opcode)),
-    Kremove(~(1<<get_reg_bit(opcode))),
+    R1(get_rd_5(opcode)),
+    Kbit(get_reg_bit(opcode)),
     status(core->status) 
 {}
 
 int avr_op_BLD::operator()() 
 {
-
-
-    byte rd  = R1;
+    byte rd  = core->ReadReg(R1);
     int  T   = status->T;
     byte res;
 
     if (T == 0)
-        res = rd & Kremove;
+        res = rd & ~(1 << Kbit);
     else
-        res = rd | Kadd; 
+        res = rd | (1 << Kbit);
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_BRBC::avr_op_BRBC
-(word opcode, AvrDevice *c):
+avr_op_BRBC::avr_op_BRBC(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_reg_bit(opcode), n_bit_unsigned_to_signed( get_k_7(opcode), 7 )),
     status(core->status) ,
     bitmask(1<<get_reg_bit(opcode)),
@@ -302,7 +283,6 @@
 
 int avr_op_BRBC::operator()() 
 {
-
     int clks;
 
     if  ((bitmask & (*(status)))==0)
@@ -329,7 +309,6 @@
 
 int avr_op_BRBS::operator()()
 {
-
     int clks;
 
     if  ((bitmask & (*(status)))!=0)
@@ -349,36 +328,31 @@
 (word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_reg_bit(opcode)),
     status(core->status) ,
-    K(1<<get_sreg_bit(opcode))
+    Kbit(get_sreg_bit(opcode))
 {}
 
 int avr_op_BSET::operator()() 
 {
-
-    *(status)=*(status)|K;
+    (*status) = (*status) | (1<<Kbit);
     return 1;
 }
 
-avr_op_BST::avr_op_BST
-(word opcode, AvrDevice *c):
+avr_op_BST::avr_op_BST(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_reg_bit(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
+    R1(get_rd_5(opcode)),
     status(core->status) ,
-    K(1<<get_reg_bit(opcode))
+    Kbit(get_reg_bit(opcode))
 {}
 
 int avr_op_BST::operator()() 
 {
-
-    status->T= ((R1&K)!=0); 
-
+    status->T = ((core->ReadReg(R1) & (1<<Kbit)) != 0); 
     return 1;
 }
 
 
 
-avr_op_CALL::avr_op_CALL
-(word opcode, AvrDevice *c):
+avr_op_CALL::avr_op_CALL(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0, 0, true),
     KH(get_k_22(opcode))
 {}
@@ -395,61 +369,53 @@
     return pc_bytes+2;
 }
 
-avr_op_CBI::avr_op_CBI
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_A_5(opcode), get_reg_bit(opcode)),
-    ioreg((*(core->ioreg))[get_A_5(opcode)]),
+avr_op_CBI::avr_op_CBI(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    ioreg(get_A_5(opcode)),
     K(~(1<<get_reg_bit(opcode)))
 {}
 
 int avr_op_CBI::operator()() 
 {
-
-    ioreg=ioreg&K;
+	int res = core->ReadIO(ioreg) & K;
+	core->WriteIO(ioreg, res);
     return 2;
 }
 
-avr_op_COM::avr_op_COM
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
+avr_op_COM::avr_op_COM(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_COM::operator()() 
 {
-
-    byte rd  = R1;
+    byte rd  = core->ReadReg(R1);
     byte res = 0xff - rd;
 
-
     status->N = ((res >> 7) & 0x1) ;
     status->C = 1 ;
     status->V = 0 ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
 
-    R1= res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_CP::avr_op_CP
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+avr_op_CP::avr_op_CP(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_CP::operator()() 
 {
-
-    byte rd  = R1;
-    byte rr  = R2;
+    byte rd  = core->ReadReg(R1);
+    byte rr  = core->ReadReg(R2);
     byte res = rd - rr;
 
-
     status->H = get_compare_carry( res, rd, rr, 3 ) ;
     status->V = get_compare_overflow( res, rd, rr ) ;
     status->N = ((res >> 7) & 0x1);
@@ -460,19 +426,17 @@
     return 1;
 }
 
-avr_op_CPC::avr_op_CPC
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+avr_op_CPC::avr_op_CPC(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_CPC::operator()() 
 {
-
-    byte rd  = R1;
-    byte rr  = R2;
+    byte rd  = core->ReadReg(R1);
+    byte rr  = core->ReadReg(R2);
     byte res = rd - rr - status->C;
 
 
@@ -491,10 +455,9 @@
 }
 
 
-avr_op_CPI::avr_op_CPI
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode), get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+avr_op_CPI::avr_op_CPI(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_4(opcode)),
     status(core->status) ,
     K(get_K_8(opcode))
 {}
@@ -502,7 +465,7 @@
 int avr_op_CPI::operator()() 
 {
 
-    byte rd  = R1;
+    byte rd  = core->ReadReg(R1);
     byte res = rd - K;
 
     status->H = get_compare_carry( res, rd, K, 3 ) ;
@@ -515,21 +478,19 @@
     return 1;
 }
 
-avr_op_CPSE::avr_op_CPSE
-(word opcode, AvrDevice *c):
+avr_op_CPSE::avr_op_CPSE(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_CPSE::operator()() 
 {
-
     int skip;
 
-    byte rd = R1;
-    byte rr = R2;
+    byte rd = core->ReadReg(R1);
+    byte rr = core->ReadReg(R2);
     int clks;
 
     if ( core->Flash->DecodedMem[(core->PC)+1]->IsInstruction2Words() ) {
@@ -552,353 +513,289 @@
 }
 
 
-avr_op_DEC::avr_op_DEC
-(word opcode, AvrDevice *c):
+avr_op_DEC::avr_op_DEC(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), 0),
-    R1((*(core->R))[get_rd_5(opcode)]),
+    R1(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_DEC::operator()() 
 {
+    byte res = core->ReadReg(R1) - 1;
 
-    byte res = R1-1;
-
     status->N = ((res >> 7) & 0x1) ;
     status->V = (res == 0x7f) ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_EICALL:: avr_op_EICALL
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0, 0),
-    RL((*(core->R))[30]),
-    RH((*(core->R))[31]),
-    eind((*(core->ioreg))[EIND])
+avr_op_EICALL:: avr_op_EICALL(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0)
 {}
 
 int  avr_op_EICALL::operator()() 
 {
-
     int pc_bytes = 3;
+    byte RL = core->ReadReg(30);
+    byte RH = core->ReadReg(31);
 
-    int new_PC=RL+(RH<<8)+((*(core->ioreg))[EIND]<<16);
+    int new_PC = RL + (RH<<8) + (core->ReadIO(EIND) << 16);
     //avr_warning( "needs serious code review\n" );
 
     avr_core_stack_push( core, pc_bytes, (core->PC)+1 );
 
     core->PC=new_PC;
-
     return 4;
 }
 
-avr_op_EIJMP::avr_op_EIJMP
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0,0),
-    RL((*(core->R))[30]),
-    RH((*(core->R))[31]),
-    eind((*(core->ioreg))[EIND])
+avr_op_EIJMP::avr_op_EIJMP(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_EIJMP::operator()() 
 {
+    byte RL = core->ReadReg(30);
+    byte RH = core->ReadReg(31);
 
-    core->PC = ((eind & 0x3f) << 16) + (RH << 8)+ RL;
+    core->PC = ((core->ReadIO(EIND) & 0x3f) << 16) + (RH << 8)+ RL;
 
     return 2;
 }
 
-avr_op_ELPM_Z::avr_op_ELPM_Z
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    ZL((*(core->R))[30]),
-    ZH((*(core->R))[31])
+avr_op_ELPM_Z::avr_op_ELPM_Z(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ELPM_Z::operator()() 
 {
-
     int Z, flash_addr;
-    unsigned char data;
 
     Z = ((core->GetRampz() & 0x3f) << 16) +
-        (ZH << 8) +
-        ZL;
+        (core->ReadReg(31) << 8) +
+        core->ReadReg(30);
 
-
     flash_addr = Z ^ 0x0001;
-    data = core->Flash->myMemory[flash_addr];
-    R1=data;
+    unsigned char data = core->Flash->myMemory[flash_addr];
 
+    core->WriteReg(R1, data);
     return 3;
 }
 
 avr_op_ELPM_Z_incr::avr_op_ELPM_Z_incr
 (word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    ZL((*(core->R))[30]),
-    ZH((*(core->R))[31])
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ELPM_Z_incr::operator()() 
 {
-
-
     int Z, flash_addr;
     unsigned char data;
 
-    Z = ((core->GetRampz() & 0x3f) << 16) +
-        (ZH << 8) +
-        ZL;
+    Z = ((core->GetRampz() & 0x3f) << 16) +
+        (core->ReadReg(31) << 8) +
+        core->ReadReg(30);
 
     flash_addr = Z ^ 0x0001;
 
     data = core->Flash->myMemory[flash_addr];
-    R1=data;
+    core->WriteReg(R1, data);
 
     /* post increment Z */
     Z += 1;
-    core->SetRampz((Z >> 16) & 0x3f);
-    ZL=Z&0xff;
-    ZH=(Z>>8)&0xff;
-
+    core->SetRampz((Z >> 16) & 0x3f);
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, (Z>>8) & 0xff);
     return 3;
 }
 
 
-avr_op_ELPM::avr_op_ELPM
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0,0),
-    R0((*(core->R))[0]),
-    ZL((*(core->R))[30]),
-    ZH((*(core->R))[31])
+avr_op_ELPM::avr_op_ELPM(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_ELPM::operator()() 
 {
-
     int Z, flash_addr;
-    unsigned char data;
-
     Z = ((core->GetRampz() & 0x3f) << 16) +
-        (ZH << 8) +
-        ZL;
+        (core->ReadReg(31) << 8) +
+        core->ReadReg(30);
 
     flash_addr = Z ^ 0x0001;
 
-    data = core->Flash->myMemory[flash_addr];
-    R0=data;
+    unsigned char data = core->Flash->myMemory[flash_addr];
+    core->WriteReg(0, data);
     return 3;
 }
 
 
-avr_op_EOR::avr_op_EOR
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+avr_op_EOR::avr_op_EOR(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_EOR::operator()() 
 {
+    byte rd = core->ReadReg(R1);
+    byte rr = core->ReadReg(R2);
 
-    byte rd = R1; 
-    byte rr = R2;
-
     byte res = rd ^ rr;
-
-
     status->V = 0 ;
     status->N = ((res >> 7) & 0x1) ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0 ) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_ESPM::avr_op_ESPM
-(word opcode, AvrDevice *c):
+avr_op_ESPM::avr_op_ESPM(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) ,
     K(get_K_6(opcode))
 {}
 
 int avr_op_ESPM::operator()()  //TODO currently not supported
 {
+    assert(false);
     return 0;
 }
 
 
 
-avr_op_FMUL::avr_op_FMUL
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_3(opcode), get_rr_3(opcode)),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
-    Rd((*(core->R))[get_rd_3(opcode)]),
-    Rr((*(core->R))[get_rr_3(opcode)]),
-    status(core->status) ,
-    K(get_K_6(opcode))
+avr_op_FMUL::avr_op_FMUL(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_3(opcode)),
+    Rr(get_rr_3(opcode)),
+    K(get_K_6(opcode)),
+    status(core->status)
 {}
 
 int avr_op_FMUL::operator()() 
 {
+    byte rd = core->ReadReg(Rd);
+    byte rr = core->ReadReg(Rr);
 
-    byte rd =  Rd;
-    byte rr =  Rr;
-
     word resp = rd * rr;
     word res = resp << 1;
-
-
     status->Z=((res & 0xffff) == 0) ;
     status->C=((resp >> 15) & 0x1) ;
 
-
     /* result goes in R1:R0 */
-    R0=res&0xff;
-    R1=res>>8;
-
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
 
-avr_op_FMULS::avr_op_FMULS
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_3(opcode), get_rr_3(opcode)),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
-    Rd((*(core->R))[get_rd_3(opcode)]),
-    Rr((*(core->R))[get_rr_3(opcode)]),
+avr_op_FMULS::avr_op_FMULS(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_3(opcode)),
+    Rr(get_rr_3(opcode)),
     status(core->status) 
 {}
 
 int avr_op_FMULS::operator()() 
 {
+    byte rd = core->ReadReg(Rd);
+    byte rr = core->ReadReg(Rr);
 
-    sbyte rd = Rd; 
-    sbyte rr = Rr;
-
     word resp = rd * rr;
     word res = resp << 1;
-
-
     status->Z = ((res & 0xffff) == 0) ;
     status->C = ((resp >> 15) & 0x1) ;
 
     /* result goes in R1:R0 */
-    R0= res& 0xff;
-    R1= res>>8;
-
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
 
-avr_op_FMULSU::avr_op_FMULSU
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_3(opcode), get_rr_3(opcode)),
-
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
-    Rd((*(core->R))[get_rd_3(opcode)]),
-    Rr((*(core->R))[get_rr_3(opcode)]),
+avr_op_FMULSU::avr_op_FMULSU(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_3(opcode)),
+    Rr(get_rr_3(opcode)),
     status(core->status) 
 {}
 
 int avr_op_FMULSU::operator()() 
 {
+    byte rd = core->ReadReg(Rd);
+    byte rr = core->ReadReg(Rr);
 
-    sbyte rd = Rd;
-    byte rr = Rr;
-
     word resp = rd * rr;
     word res = resp << 1;
-
-
     status->Z=((res & 0xffff) == 0) ;
     status->C=((resp >> 15) & 0x1) ;
-    R0= res& 0xff;
-    R1= res>>8;
 
+    /* result goes in R1:R0 */
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
-avr_op_ICALL::avr_op_ICALL
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0,0),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31]),
-    pc_bytes((c->PC_size) )
+avr_op_ICALL::avr_op_ICALL(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_ICALL::operator()() 
 {
-
     int pc = core->PC;
 
     /* Z is R31:R30 */
-    int new_pc = (Rh << 8) + Rl;
+    int new_pc = (core->ReadReg(31) << 8) + core->ReadReg(30);
 
-    avr_core_stack_push( core, pc_bytes, pc+1 );
+    avr_core_stack_push( core, core->PC_size, pc+1 );
 
     core->PC=new_pc-1;
-
-    return pc_bytes+1;
+    return core->PC_size + 1;
 }
 
 
-avr_op_IJMP::avr_op_IJMP
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0,0),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_IJMP::avr_op_IJMP(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_IJMP::operator()() 
 {
-
-    int new_pc = (Rh << 8) + Rl;
+    /* Z is R31:R30 */
+    int new_pc = core->ReadRegZ();
     core->PC=new_pc-1;
-
     return 2;
 }
 
 
-avr_op_IN::avr_op_IN
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_A_6(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    ioreg((*(core->ioreg))[get_A_6(opcode)])
+avr_op_IN::avr_op_IN(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_5(opcode)),
+    ioreg(get_A_6(opcode))
 {}
 
 int avr_op_IN::operator()() 
 {
-    R1=ioreg;
+    unsigned int res = core->ReadIO(ioreg);
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_INC::avr_op_INC
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
+avr_op_INC::avr_op_INC(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    R1(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_INC::operator()() 
 {
-    byte rd  = R1;
+    byte rd  = core->ReadReg(R1);
     byte res = rd + 1;
 
     status->N = ((res >> 7) & 0x1) ;
@@ -906,12 +803,11 @@
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
 
-    R1=res;
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_JMP::avr_op_JMP
-(word opcode, AvrDevice *c):
+avr_op_JMP::avr_op_JMP(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_k_22(opcode), 0, true),
     K(get_k_22(opcode))
 {}
@@ -925,96 +821,84 @@
     return 3;
 }
 
-avr_op_LDD_Y::avr_op_LDD_Y
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_q(opcode)),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29]),
-    Rd((*(core->R))[get_rd_5(opcode)]),
+avr_op_LDD_Y::avr_op_LDD_Y(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
     K(get_q(opcode))
 {}
 
 int avr_op_LDD_Y::operator()() 
 {
     /* Y is R29:R28 */
-    word Y = ( Rh << 8) + Rl; 
-    Rd = (*(core->Sram))[Y+K];
+    word Y = (core->ReadReg(29) << 8) + core->ReadReg(28); 
+    byte res = core->ReadSram(Y+K);
+    core->WriteReg(Rd, res);
     return 2;
 }
 
-avr_op_LDD_Z::avr_op_LDD_Z
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_q(opcode)),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31]),
+avr_op_LDD_Z::avr_op_LDD_Z(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
     K(get_q(opcode))
 {}
 
 int avr_op_LDD_Z::operator()() 
 {
     /* Z is R31:R30 */
-    word Z = (Rh<< 8) + Rl;
-    Rd = (*(core->Sram))[Z+K];
+    word Z = (core->ReadReg(31) << 8) + core->ReadReg(30); 
+    byte res = core->ReadSram(Z+K);
+    core->WriteReg(Rd, res);
     return 2;
 }
 
 
 
-avr_op_LDI::avr_op_LDI
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode),  get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+avr_op_LDI::avr_op_LDI(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,  0),
+    R1(get_rd_4(opcode)),
     K(get_K_8(opcode)) {
     }
 
 
-int avr_op_LDI::operator()() { 
-    R1=K;
-
+int avr_op_LDI::operator()()
+{
+    core->WriteReg(R1, K);
     return 1;   //used clocks
 }
 
 
-avr_op_LDS::avr_op_LDS
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), 0, true),
-    R1((*(core->R))[get_rd_5(opcode)])
+avr_op_LDS::avr_op_LDS(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0, true),
+    R1(get_rd_5(opcode))
 {}
 
-int avr_op_LDS::operator()()  //TODO, read sram as reference also! read second word!!!
+int avr_op_LDS::operator()()
 {
     /* Get data at k in current data segment and put into Rd */
 	word K = core->Flash->GetWord( (core->PC+1) * 2 );
-    R1 = (*(core->Sram))[K];
+    byte res = core->ReadSram(K);
+    core->WriteReg(R1, res);
     core->PC++; //2 word instr
-
     return 2;
 }
 
-avr_op_LD_X::avr_op_LD_X
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27]),
-    Rd((*(core->R))[get_rd_5(opcode)])
+avr_op_LD_X::avr_op_LD_X(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_X::operator()() 
 {
     /* X is R27:R26 */
-    word X = (Rh << 8) + Rl;
-    Rd= (*(core->Sram))[X];
+    word X = core->ReadRegX();
+    byte res = core->ReadSram(X);
+    core->WriteReg(Rd, K);
     return 2;
 }
 
-avr_op_LD_X_decr::avr_op_LD_X_decr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27]),
-    status(core->status) ,
+avr_op_LD_X_decr::avr_op_LD_X_decr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
     K(get_K_6(opcode))
 {}
 
@@ -1025,409 +909,323 @@
     //  avr_error( "Results of operation are undefined" );
 
     /* X is R27:R26 */
-    word X = (Rh << 8 ) + Rl; 
+    word X = core->ReadRegX(); 
 
     /* Perform pre-decrement */
     X -= 1;
-    Rd = (*(core->Sram))[X];
-    Rl =X&0xff;
-    Rh=X>>8;
+    byte res = core->ReadSram(X);
+    core->WriteReg(Rd, res);
+    core->WriteReg(26, X & 0xff);
+    core->WriteReg(27, X >> 8);
 
     return 2;
 }
 
 
 
-avr_op_LD_X_incr::avr_op_LD_X_incr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27])
+avr_op_LD_X_incr::avr_op_LD_X_incr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_X_incr::operator()() 
 {
-
-    word X;
-
-
     //TODO
     //if ( (Rd == 26) || (Rd == 27) )
     //  avr_error( "Results of operation are undefined" );
 
     /* X is R27:R26 */
-    X = (Rh << 8 ) + Rl;
+    word X = core->ReadRegX();
 
-    Rd= (*(core->Sram))[X];
+    byte res = core->ReadSram(X);
+    core->WriteReg(Rd, res);
 
     /* Perform post-increment */
     X += 1;
-    Rl=X&0xff;
-    Rh=X>>8;
+    core->WriteReg(26, X & 0xff);
+    core->WriteReg(27, X >> 8);
 
     return 2;
 }
 
 
-avr_op_LD_Y_decr::avr_op_LD_Y_decr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c,  get_rd_5(opcode), 0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29])
+avr_op_LD_Y_decr::avr_op_LD_Y_decr(word opcode, AvrDevice *c):
+    DecodedInstruction(c,  0, 0),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_Y_decr::operator()() 
 {
-
-    word Y;
-
-
     //TODO
     //if ( (p1 == 28) || (p1 == 29) )
     //  avr_error( "Results of operation are undefined" );
 
     /* Y is R29:R28 */
-    Y = ( Rh << 8) + Rl;
+    word Y = core->ReadRegY();
 
     /* Perform pre-decrement */
     Y -= 1;
-    Rd=(*(core->Sram))[Y];
-    Rl=Y&0xff;
-    Rh=Y>>8;
+    byte res = core->ReadSram(Y);
 
+    core->WriteReg(Rd, res);
+    core->WriteReg(28, Y & 0xff);
+    core->WriteReg(29, Y >> 8);
     return 2;
 }
 
 
-avr_op_LD_Y_incr::avr_op_LD_Y_incr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0 ),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29])
+avr_op_LD_Y_incr::avr_op_LD_Y_incr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0 ),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_Y_incr::operator()() 
 {
-
-    word Y;
-
-
     //TODO
     //if ( (Rd == 28) || (Rd == 29) )
     //  avr_error( "Results of operation are undefined" );
 
     /* Y is R29:R28 */
-    Y = (Rh << 8) + Rl;
-    Rd=(*(core->Sram))[Y];
+    word Y = core->ReadRegY();
+
+    byte res = core->ReadSram(Y);
     Y += 1;
-    Rl=Y&0xff;
-    Rh=Y>>8;
 
+    core->WriteReg(Rd, res);
+    core->WriteReg(28, Y & 0xff);
+    core->WriteReg(29, Y >> 8);
     return 2;
 }
 
-avr_op_LD_Z_incr::avr_op_LD_Z_incr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_LD_Z_incr::avr_op_LD_Z_incr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_Z_incr::operator()() 
 {
-
-    word Z;
-
-
     //TODO
     ////if ( (Rd == 30) || (Rd == 31) )
     //  avr_error( "Results of operation are undefined" );
 
     /* Z is R31:R30 */
-    Z = (Rh<<8) + Rl;
+    word Z = core->ReadRegZ();
 
+    byte res = core->ReadSram(Z);
     /* Perform post-increment */
-    Rd=(*(core->Sram))[Z];
     Z += 1;
-    Rl = Z&0xff;
-    Rh = Z>>8;
 
+    core->WriteReg(Rd, res);
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, Z >> 8);
     return 2;
 }
 
-avr_op_LD_Z_decr::avr_op_LD_Z_decr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0 ),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_LD_Z_decr::avr_op_LD_Z_decr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0 ),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LD_Z_decr::operator()() 
 {
-
-    word Z;
-
     //TODO
     //if ( (Rd == 30) || (Rd == 31) )
     //  avr_error( "Results of operation are undefined" );
 
     /* Z is R31:R30 */
-    Z = (Rh << 8 ) + Rl ;
+    word Z = core->ReadRegZ();
 
-
     /* Perform pre-decrement */
     Z -= 1;
-    Rd=(*(core->Sram))[Z];
-    Rl=Z&0xff;
-    Rh=Z>>8;
+    byte res = core->ReadSram(Z);
 
+    core->WriteReg(Rd, res);
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, Z >> 8);
     return 2;
 }
 
-avr_op_LPM_Z::avr_op_LPM_Z
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_LPM_Z::avr_op_LPM_Z(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    Rd(get_rd_5(opcode))
 {}
 
 int  avr_op_LPM_Z::operator()() 
 {
-
-    word Z;
-    unsigned char data;
-
-
     /* Z is R31:R30 */
-    Z = (Rh << 8 ) + Rl;
-
+    word Z = core->ReadRegZ();
     Z^=0x0001;
-    data = core->Flash->myMemory[Z];
+    byte data = core->Flash->myMemory[Z];
 
-    Rd=data;
-
+    core->WriteReg(Rd, data);
     return 3;
 }
 
-avr_op_LPM::avr_op_LPM
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, 0,0),
-    R0((*(core->R))[0]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_LPM::avr_op_LPM(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_LPM::operator()() 
 {
-
-    word Z;
-    unsigned char data;
-    Z = (Rh << 8 ) + Rl; 
-
+    word Z = core->ReadRegZ();
     Z^=0x0001;
-    data = core->Flash->myMemory[Z];
+    byte data = core->Flash->myMemory[Z];
 
-    R0=data;
+    core->WriteReg(0, data);
     return 3;
 }
 
 
-avr_op_LPM_Z_incr::avr_op_LPM_Z_incr
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), 0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+avr_op_LPM_Z_incr::avr_op_LPM_Z_incr(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode))
 {}
 
 int avr_op_LPM_Z_incr::operator()() 
 {
+    word Z = core->ReadRegZ();
+    Z^=0x0001;
+    byte data = core->Flash->myMemory[Z];
 
-    word Z, flashAddr;
-    unsigned char data;
-
-
-    Z = ( Rh << 8 ) + Rl ;
-    flashAddr= Z^ 0x0001;
-    data = core->Flash->myMemory[flashAddr];
-
-    Rd=data;
+    core->WriteReg(Rd, data);
     Z += 1;
-    Rl=Z&0xff;
-    Rh=Z>>8;
 
+    core->WriteReg(Rd, data);
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, Z >> 8);
     return 3;
 }
 
-avr_op_LSR::avr_op_LSR
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
+avr_op_LSR::avr_op_LSR(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0,0),
+    Rd(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_LSR::operator()() 
 {
-
-
-    byte rd = Rd; 
-
+    byte rd = core->ReadReg(Rd);
     byte res = (rd >> 1) & 0x7f;
 
-
     status->C = (rd & 0x1) ;
     status->N = (0) ;
     status->V = (status->N ^ status->C) ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
 
-    Rd=res;
-
+    core->WriteReg(Rd, res);
     return 1;
 }
 
 
-avr_op_MOV::avr_op_MOV
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)])
+avr_op_MOV::avr_op_MOV(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode))
 {}
 
 int avr_op_MOV::operator()() 
 {
-    R1=R2;
+    byte res = core->ReadReg(R2);
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
 
-avr_op_MOVW::avr_op_MOVW
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode), get_rr_4(opcode)),
-    Rdl((*(core->R))[(get_rd_4(opcode)-16)<<1]),
-    Rdh((*(core->R))[((get_rd_4(opcode)-16)<<1)+1]),
-    Rsl((*(core->R))[(get_rr_4(opcode)-16)<<1]),
-    Rsh((*(core->R))[((get_rr_4(opcode)-16)<<1) +1]),
-    status(core->status) ,
-    K(get_K_6(opcode))
+avr_op_MOVW::avr_op_MOVW(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd((get_rd_4(opcode)-16)<<1),
+    Rs((get_rr_4(opcode)-16)<<1)
 {}
 
 int avr_op_MOVW::operator()() 
 {
-    Rdl=Rsl;
-    Rdh=Rsh;
-
+    byte res_lo = core->ReadReg(Rs);
+    byte res_hi = core->ReadReg(Rs+1);
+    core->WriteReg(Rd  , res_lo);
+    core->WriteReg(Rd+1, res_hi);
     return 1;
 }
 
 
-avr_op_MUL::avr_op_MUL
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rr((*(core->R))[get_rr_5(opcode)]),
+avr_op_MUL::avr_op_MUL(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
+    Rr(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_MUL::operator()() 
 {
-
-    byte rd = Rd;
-    byte rr = Rr;
-
+    byte rd = core->ReadReg(Rd);
+    byte rr = core->ReadReg(Rr);
     word res = rd * rr;
 
     core->status->Z=((res & 0xffff) == 0) ;
     core->status->C=((res >> 15) & 0x1) ;
 
-
     /* result goes in R1:R0 */
-    R0=res&0xff;
-    R1=res>>8;
-
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
 
-avr_op_MULS::avr_op_MULS
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode), get_rr_4(opcode)),
-    Rd((*(core->R))[get_rd_4(opcode)]),
-    Rr((*(core->R))[get_rr_4(opcode)]),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
+avr_op_MULS::avr_op_MULS(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_4(opcode)),
+    Rr(get_rr_4(opcode)),
     status(core->status) 
 {}
 
 int avr_op_MULS::operator()() 
 {
-
-    sbyte rd = (sbyte)Rd;
-    sbyte rr = (sbyte)Rr;
+    sbyte rd = (sbyte) core->ReadReg(Rd);
+    sbyte rr = (sbyte) core->ReadReg(Rr);
     sword res = rd * rr;
 
-
     status->Z=((res & 0xffff) == 0) ;
     status->C=((res >> 15) & 0x1) ;
 
     /* result goes in R1:R0 */
-    R0=res&0xff;
-    R1=res>>8;
-
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
-avr_op_MULSU::avr_op_MULSU
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_3(opcode), get_rr_3(opcode)),
-    Rd((*(core->R))[get_rd_3(opcode)]),
-    Rr((*(core->R))[get_rr_3(opcode)]),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1]),
+avr_op_MULSU::avr_op_MULSU(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_3(opcode)),
+    Rr(get_rr_3(opcode)),
     status(core->status) 
 {}
 
 int avr_op_MULSU::operator()() 
 {
-
-    sbyte rd = (sbyte)Rd;
-    byte rr = Rr;
-
+    sbyte rd = (sbyte) core->ReadReg(Rd);
+    byte  rr =         core->ReadReg(Rr);
     sword res = rd * rr;
 
-
     status->Z=((res & 0xffff) == 0) ;
     status->C=((res >> 15) & 0x1) ;
 
-
     /* result goes in R1:R0 */
-    R0=res&0xff;
-    R1=res>>8;
-
+    core->WriteReg(0, res & 0xff);
+    core->WriteReg(1, res >> 8);
     return 2;
 }
 
 
-avr_op_NEG::avr_op_NEG
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode),0),
-    Rd((*(core->R))[get_rd_5(opcode)]),
+avr_op_NEG::avr_op_NEG(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_NEG::operator()() 
 {
-
-    byte rd  = Rd;
+    byte rd  = core->ReadReg(Rd);
     byte res = (0x0 - rd) & 0xff;
 
     core->status->H = (((res >> 3) | (rd >> 3)) & 0x1) ;
@@ -1437,119 +1235,103 @@
     core->status->Z = (res == 0x0) ;
     core->status->C = (res != 0x0) ;
 
-    Rd =res;
-
+    core->WriteReg(Rd, res);
     return 1;
 }
 
 
-avr_op_NOP::avr_op_NOP
-(word opcode, AvrDevice *c):
+avr_op_NOP::avr_op_NOP(word opcode, AvrDevice *c):
     DecodedInstruction(c,0,0)
 {}
 
 int avr_op_NOP::operator()() 
 {
-
     return 1;
 }
 
-avr_op_OR::avr_op_OR
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    Rd((*(core->R))[get_rd_5(opcode)]),
-    Rr((*(core->R))[get_rr_5(opcode)]),
+avr_op_OR::avr_op_OR(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    Rd(get_rd_5(opcode)),
+    Rr(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_OR::operator()() 
 {
 
-    byte res = Rd | Rr;
+    byte res = core->ReadReg(Rd) | core->ReadReg(Rr);
 
     core->status->V = (0) ;
     core->status->N = ((res >> 7) & 0x1) ;
     core->status->S = (core->status->N ^ core->status->V) ;
     core->status->Z = (res == 0x0) ;
 
-    Rd = res;
-
+    core->WriteReg(Rd, res);
     return 1;
 }
 
 
-avr_op_ORI::avr_op_ORI
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_rd_4(opcode), get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+avr_op_ORI::avr_op_ORI(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    R1(get_rd_4(opcode)),
     status(core->status) ,
     K(get_K_8(opcode))
 {}
 
 int avr_op_ORI::operator()() 
 {
+    byte res = core->ReadReg(R1) | K;
 
-
-    byte res = R1 | K;
-
     status->V = (0) ;
     status->N = ((res >> 7) & 0x1) ;
     status->S = (status->N ^ status->V) ;
     status->Z = (res == 0x0) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
 
-avr_op_OUT::avr_op_OUT
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_A_6(opcode), get_rd_5(opcode)),
-    ioreg((*(core->ioreg))[get_A_6(opcode)]),
-    R1((*(core->R))[get_rd_5(opcode)])
+avr_op_OUT::avr_op_OUT(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    ioreg(get_A_6(opcode)),
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_OUT::operator()() 
 {
-
-    ioreg=R1;
-
+    byte res = core->ReadReg(R1);
+    core->WriteIO(ioreg, res);
     return 1;
 }
 
 
-avr_op_POP::avr_op_POP
-(word opcode, AvrDevice *c):
+avr_op_POP::avr_op_POP(word opcode, AvrDevice *c):
     DecodedInstruction(c,  get_rd_5(opcode),0 ),
-    R1((*(core->R))[get_rd_5(opcode)])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_POP::operator()() 
 {
-
-    R1= avr_core_stack_pop(core, 1);
-
+    byte res = avr_core_stack_pop(core, 1);
+    core->WriteReg(R1, res);
     return 2;
 }
 
-avr_op_PUSH::avr_op_PUSH
-(word opcode, AvrDevice *c):
+avr_op_PUSH::avr_op_PUSH(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), 0),
-    R1((*(core->R))[get_rd_5(opcode)])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_PUSH::operator()() 
 {
-
-    avr_core_stack_push( core, 1, R1 );
-
+    byte res = core->ReadReg(R1);
+    avr_core_stack_push( core, 1, res );
     return 2;
 }
 
-avr_op_RCALL::avr_op_RCALL
-(word opcode, AvrDevice *c):
+avr_op_RCALL::avr_op_RCALL(word opcode, AvrDevice *c):
     DecodedInstruction(c, n_bit_unsigned_to_signed( get_k_12(opcode), 12 ),0),
     K(n_bit_unsigned_to_signed( get_k_12(opcode), 12 ))
 {}
@@ -1566,8 +1348,7 @@
     return pc_bytes+1;
 }
 
-avr_op_RET::avr_op_RET
-(word opcode, AvrDevice *c):
+avr_op_RET::avr_op_RET(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0)
 {}
 
@@ -1581,16 +1362,13 @@
     return pc_bytes+2;
 }
 
-avr_op_RETI::avr_op_RETI
-(word opcode, AvrDevice *c):
+avr_op_RETI::avr_op_RETI(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0),
     status(core->status) 
 {}
 
 int avr_op_RETI::operator()() 
 {
-
-
     int pc_bytes = core->PC_size;
     int pc = avr_core_stack_pop( core, pc_bytes );
 
@@ -1600,65 +1378,54 @@
     return pc_bytes+2;
 }
 
-avr_op_RJMP::avr_op_RJMP
-(word opcode, AvrDevice *c):
+avr_op_RJMP::avr_op_RJMP(word opcode, AvrDevice *c):
     DecodedInstruction(c, n_bit_unsigned_to_signed( get_k_12(opcode), 12 ),0),
     K(n_bit_unsigned_to_signed( get_k_12(opcode), 12 ))
 {}
 
 int avr_op_RJMP::operator()() 
 {
-
     core->PC+=K;
     core->PC&=(core->Flash->GetSize()-1)>>1;
-
     return 2;
 }
 
 
 
-avr_op_ROR::avr_op_ROR
-(word opcode, AvrDevice *c):
+avr_op_ROR::avr_op_ROR(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
+    R1(get_rd_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_ROR::operator()() 
 {
-
-
-    byte rd = R1;
-
+    byte rd = core->ReadReg(R1);
     byte res = (rd >> 1) | ((( status->C ) << 7) & 0x80);
 
-
     status->C = (rd & 0x1) ;
     status->N = ((res >> 7) & 0x1) ;
     status->V = (status->N ^ status->C) ;
     status->S = (status->N ^ status->V) ;
     status->Z = (res == 0) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
-avr_op_SBC::avr_op_SBC
-(word opcode, AvrDevice *c):
+avr_op_SBC::avr_op_SBC(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_SBC::operator()() 
 {
+    byte rd = core->ReadReg(R1);
+    byte rr = core->ReadReg(R2);
 
-    byte rd = R1;
-    byte rr = R2;
-
     byte res = rd - rr - ( status->C );
 
 
@@ -1671,27 +1438,22 @@
     if ((res & 0xff) != 0)
         status->Z = (0) ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_SBCI::avr_op_SBCI
-(word opcode, AvrDevice *c):
+avr_op_SBCI::avr_op_SBCI(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_4(opcode), get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+    R1(get_rd_4(opcode)),
     status(core->status) ,
     K(get_K_8(opcode))
 {}
 
 int avr_op_SBCI::operator()() 
 {
-
-    byte rd = R1;
-
+    byte rd = core->ReadReg(R1);
     byte res = rd - K - ( status->C );
 
-
     status->H = (get_sub_carry( res, rd, K, 3 )) ;
     status->V = (get_sub_overflow( res, rd, K )) ;
     status->N = ((res >> 7) & 0x1) ;
@@ -1701,47 +1463,39 @@
     if ((res & 0xff) != 0)
         status->Z = 0 ;
 
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
-avr_op_SBI::avr_op_SBI
-(word opcode, AvrDevice *c):
+avr_op_SBI::avr_op_SBI(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_A_5(opcode), get_reg_bit(opcode)),
-    ioreg((*(core->ioreg))[get_A_5(opcode)]),
+    ioreg(get_A_5(opcode)),
     K(1<<get_reg_bit(opcode))
 {}
 
 int avr_op_SBI::operator()() 
 {
-
-    ioreg=ioreg|  K ;
-
+    byte res = core->ReadIO(ioreg) | K;
+    core->WriteIO(ioreg, res);
     return 2;
 }
 
 
-avr_op_SBIC::avr_op_SBIC
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c, get_A_5(opcode), get_reg_bit(opcode)),
-    ioreg((*(core->ioreg))[get_A_5(opcode)]),
+avr_op_SBIC::avr_op_SBIC(word opcode, AvrDevice *c):
+    DecodedInstruction(c, 0, 0),
+    ioreg(get_A_5(opcode)),
     K(1<<get_reg_bit(opcode))
 {}
 
 int avr_op_SBIC::operator()() 
 {
-
     int skip;
-
     int clks;
-
-
     if ( core->Flash->DecodedMem[core->PC+1]->IsInstruction2Words() ) skip = 3;
     else skip = 2;
 
-    if (( ioreg&K  ) == 0)
+    if (( core->ReadIO(ioreg) & K ) == 0)
     {
         core->PC+=skip-1;
         clks=skip;
@@ -1754,26 +1508,22 @@
     return clks;
 }
 
-avr_op_SBIS::avr_op_SBIS
-(word opcode, AvrDevice *c):
+avr_op_SBIS::avr_op_SBIS(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_A_5(opcode), get_reg_bit(opcode)),
-    ioreg((*(core->ioreg))[get_A_5(opcode)]),
+    ioreg(get_A_5(opcode)),
     K(1<<get_reg_bit(opcode))
 {}
 
 int avr_op_SBIS::operator()() 
 {
-
     int skip;
-
     int clks;
-
     if ( core->Flash->DecodedMem[core->PC+1]->IsInstruction2Words() )
         skip = 3;
     else
         skip = 2;
 
-    if ( (ioreg&K ) != 0)
+    if ( ( core->ReadIO(ioreg) & K ) != 0)
     {
         core->PC+=skip-1;
         clks=skip;
@@ -1787,44 +1537,36 @@
 }
 
 
-avr_op_SBIW::avr_op_SBIW
-(word opcode, AvrDevice *c):
+avr_op_SBIW::avr_op_SBIW(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_2(opcode), get_K_6(opcode)),
-    Rl((*(core->R))[get_rd_2(opcode)]),
-    Rh((*(core->R))[get_rd_2(opcode)+1]),
+    Rl(get_rd_2(opcode)),
     status(core->status) ,
     K(get_K_6(opcode))
 {}
 
 int avr_op_SBIW::operator()() 
 {
-
-    byte rdl = Rl;
-    byte rdh = Rh;
-
+    byte rdl = core->ReadReg(Rl);
+    byte rdh = core->ReadReg(Rl+1);
     word rd = (rdh << 8) + rdl;
-
     word res = rd - K;
 
-
     status->V = ((rdh >> 7 & 0x1) & ~(res >> 15 & 0x1)) ;
     status->N = ((res >> 15) & 0x1) ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xffff) == 0) ;
     status->C = ((res >> 15 & 0x1) & ~(rdh >> 7 & 0x1)) ;
 
-    Rl=res&0xff;
-    Rh=res>>8;
-
+    core->WriteReg(Rl,   res & 0xff);
+    core->WriteReg(Rl+1, res >> 8);
     return 2;
 }
 
 
-avr_op_SBRC::avr_op_SBRC
-(word opcode, AvrDevice *c):
+avr_op_SBRC::avr_op_SBRC(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_reg_bit(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    K(1<<get_reg_bit(opcode))
+    R1(get_rd_5(opcode)),
+    Kbit(get_reg_bit(opcode))
 {}
 
 int avr_op_SBRC::operator()() 
@@ -1837,7 +1579,7 @@
     else
         skip = 2;
 
-    if ((R1 & K ) == 0)
+    if (( core->ReadReg(R1) & (1<<Kbit) ) == 0)
     {
         core->PC+=skip-1;
         clks=skip;
@@ -1850,26 +1592,23 @@
     return clks;
 }
 
-avr_op_SBRS::avr_op_SBRS
-(word opcode, AvrDevice *c):
+avr_op_SBRS::avr_op_SBRS(word opcode, AvrDevice *c):
     DecodedInstruction(c,  get_rd_5(opcode), get_reg_bit(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    K(1<<get_reg_bit(opcode))
+    R1(get_rd_5(opcode)),
+    Kbit(get_reg_bit(opcode))
 {}
 
 int avr_op_SBRS::operator()() 
 {
-
     int skip;
     int clks;
 
-
     if ( core->Flash->DecodedMem[core->PC+1]->IsInstruction2Words() )
         skip = 3;
     else
         skip = 2;
 
-    if ((R1 & K ) != 0) 
+    if ((core->ReadReg(R1) & (1<<Kbit) ) != 0) 
     {
         core->PC+=skip-1;
         clks=skip;
@@ -1882,8 +1621,7 @@
     return clks;
 }
 
-avr_op_SLEEP::avr_op_SLEEP
-(word opcode, AvrDevice *c):
+avr_op_SLEEP::avr_op_SLEEP(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0)
 {}
 
@@ -1917,322 +1655,244 @@
     return 0;
 }
 
-avr_op_SPM::avr_op_SPM
-(word opcode, AvrDevice *c):
-    DecodedInstruction(c,0,0),
-    R0((*(core->R))[0]),
-    R1((*(core->R))[1])
+avr_op_SPM::avr_op_SPM(word opcode, AvrDevice *c):
+    DecodedInstruction(c,0,0)
 {}
 
 int avr_op_SPM::operator()() 
 {
+    // TODO
 
-
     return 0;
 }
 
-avr_op_STD_Y::avr_op_STD_Y
-(word opcode, AvrDevice *c):
+avr_op_STD_Y::avr_op_STD_Y(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_q(opcode), get_rd_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29]),
+    R1(get_rd_5(opcode)),
     K(get_q(opcode))
 {}
 
 int avr_op_STD_Y::operator()() 
 {
-
-    //int Rd = get_rd_5(opcode);
-    //int q  = get_q(opcode);
-    //int q=p1;
-
     /* Y is R29:R28 */
-    int Y = ( Rh << 8 )  + Rl;
+    word Y = core->ReadRegY();
+    byte res = core->ReadReg(R1);
 
-    (*(core->Sram))[Y+K]= R1 ;
+    core->WriteSram(Y+K, res);
 
     //avr_core_PC_incr( core, 1 );
     //avr_core_inst_CKS_set( core, 2 );
-
     return 2;
 }
 
 
-avr_op_STD_Z::avr_op_STD_Z
-(word opcode, AvrDevice *c):
+avr_op_STD_Z::avr_op_STD_Z(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_q(opcode), get_rd_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31]),
+    R1(get_rd_5(opcode)),
     K(get_q(opcode))
 {}
 
 int avr_op_STD_Z::operator()() 
 {
-
-    int Z;
-
-    //int Rd = get_rd_5(opcode);
-
     /* Z is R31:R30 */
-    Z = (Rh << 8 ) + Rl;
+    word Z = core->ReadRegZ();
+    byte res = core->ReadReg(R1);
 
-    //avr_core_mem_write( core, Z+q, (*(core->R))[ Rd] );
-    (*(core->Sram))[Z+K]=R1;
+    core->WriteSram(Z+K, res);
 
     //avr_core_PC_incr( core, 1 );
     //avr_core_inst_CKS_set( core, 2 );
-
     return 2;
 }
 
 
-avr_op_STS::avr_op_STS
-(word opcode, AvrDevice *c):
+avr_op_STS::avr_op_STS(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0, true),
-    R1((*(core->R))[get_rd_5(opcode)])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_STS::operator()() 
 {
     /* Get data at k in current data segment and put into Rd */
     word k = core->Flash->GetWord((core->PC+1) * 2);
+    byte res = core->ReadReg(R1);
 
-    //avr_core_mem_write( core, k, (*(core->R))[ Rd] );
-
-    (*(core->Sram))[k]=R1;
+    core->WriteSram(k, res);
     core->PC++;
 
     //avr_core_PC_incr( core, 2 );
     //avr_core_inst_CKS_set( core, 2 );
-
     return 2;
 }
 
-avr_op_ST_X::avr_op_ST_X
-(word opcode, AvrDevice *c):
+avr_op_ST_X::avr_op_ST_X(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_X::operator()() 
 {
-
-    word X;
-
-    //int Rd = get_rd_5(opcode);
-
     /* X is R27:R26 */
-    //X = ((*(core->R))[ 27] << 8) + (*(core->R))[ 26];
-    X = (Rh << 8 ) + Rl;
+    word X = core->ReadRegX();
+    byte res = core->ReadReg(R1);
 
-    //avr_core_mem_write( core, X, (*(core->R))[ Rd] );
-    (*(core->Sram))[X]=R1;
+    core->WriteSram(X, res);
 
-
     //avr_core_PC_incr( core, 1 );
     //avr_core_inst_CKS_set( core, 2 );
-
     return 2;
 }
 
 
-avr_op_ST_X_decr::avr_op_ST_X_decr
-(word opcode, AvrDevice *c):
+avr_op_ST_X_decr::avr_op_ST_X_decr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_X_decr::operator()() 
 {
-
-    word X;
-
-
-    //TODO
-    //if ( (Rd == 26) || (Rd == 27) )
-    //  avr_error( "Results of operation are undefined: 0x%04x", opcode );
-
     /* X is R27:R26 */
-    X = (Rh << 8 ) + Rl ;
+    word X = core->ReadRegX();
+    byte res = core->ReadReg(R1);
 
     /* Perform pre-decrement */
     X -= 1;
-    Rl=X & 0xff;
-    Rh=X >> 8;
+    core->WriteSram(X, res);
 
-    (*(core->Sram))[X]=R1;
-
+    core->WriteReg(26, X & 0xff);
+    core->WriteReg(27, X >> 8);
     return 2;
 }
 
-avr_op_ST_X_incr::avr_op_ST_X_incr
-(word opcode, AvrDevice *c):
+avr_op_ST_X_incr::avr_op_ST_X_incr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[26]),
-    Rh((*(core->R))[27])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_X_incr::operator()() 
 {
-
-    word X;
-
     /* X is R27:R26 */
-    X = ( Rh << 8 ) + Rl;
+    word X = core->ReadRegX();
+    byte res = core->ReadReg(R1);
 
-    (*(core->Sram))[X]=R1;
-
+    core->WriteSram(X, res);
     /* Perform post-increment */
     X += 1;
-    Rl=X&0xff;
-    Rh=X>>8;
 
+    core->WriteReg(26, X & 0xff);
+    core->WriteReg(27, X >> 8);
     return 2;
 }
 
-avr_op_ST_Y_decr::avr_op_ST_Y_decr
-(word opcode, AvrDevice *c):
+avr_op_ST_Y_decr::avr_op_ST_Y_decr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_Y_decr::operator()() 
 {
-
     //TODO
     //if ( (Rd == 28) || (Rd == 29) )
     //  avr_error( "Results of operation are undefined: 0x%04x", opcode );
 
     /* Y is R29:R28 */
-    unsigned int Y = (Rh << 8 ) + Rl;
+    word Y = core->ReadRegY();
+    byte res = core->ReadReg(R1);
 
     /* Perform pre-decrement */
     Y -= 1;
-    Rl=Y&0xff;
-    Rh=Y>>8;
+    core->WriteSram(Y, res);
 
-    (*(core->Sram))[Y]=R1;
-
-
+    core->WriteReg(28, Y & 0xff);
+    core->WriteReg(29, Y >> 8);
     return 2;
 }
 
-avr_op_ST_Y_incr::avr_op_ST_Y_incr
-(word opcode, AvrDevice *c):
+avr_op_ST_Y_incr::avr_op_ST_Y_incr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[28]),
-    Rh((*(core->R))[29])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_Y_incr::operator()() 
 {
-
-    word Y;
-
     //TODO
     //if ( (Rd == 28) || (Rd == 29) )
     //  avr_error( "Results of operation are undefined: 0x%04x", opcode );
 
     /* Y is R29:R28 */
-    Y = (Rh << 8 ) + Rl;
+    word Y = core->ReadRegY();
+    byte res = core->ReadReg(R1);
 
-    (*(core->Sram))[Y]=R1;
+    core->WriteSram(Y, res);
 
     /* Perform post-increment */
     Y += 1;
-    Rl=Y&0xff;
-    Rh=Y>>8;
 
+    core->WriteReg(28, Y & 0xff);
+    core->WriteReg(29, Y >> 8);
     return 2;
 }
 
-avr_op_ST_Z_decr::avr_op_ST_Z_decr
-(word opcode, AvrDevice *c):
+avr_op_ST_Z_decr::avr_op_ST_Z_decr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0 ),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_Z_decr::operator()() 
 {
-
-    word Z;
-
-
     //TODO
     //if ( (Rd == 30) || (Rd == 31) )
     //  avr_error( "Results of operation are undefined: 0x%04x", opcode );
 
     /* Z is R31:R30 */
-    Z = ( Rh << 8) + Rl;
+    word Z = core->ReadRegZ();
+    byte res = core->ReadReg(R1);
 
     /* Perform pre-decrement */
     Z -= 1;
-    Rl=Z&0xff;
-    Rh=Z>>8;
+    core->WriteSram(Z, res);
 
-    (*(core->Sram))[Z]=R1;
-
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, Z >> 8);
     return 2;
 }
 
 
-avr_op_ST_Z_incr::avr_op_ST_Z_incr
-(word opcode, AvrDevice *c):
+avr_op_ST_Z_incr::avr_op_ST_Z_incr(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    Rl((*(core->R))[30]),
-    Rh((*(core->R))[31])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_ST_Z_incr::operator()() 
 {
-
-    word Z;
-
-
     //TODO
     //if ( (Rd == 30) || (Rd == 31) )
     //  avr_error( "Results of operation are undefined: 0x%04x", opcode );
 
     /* Z is R31:R30 */
-    Z = ( Rh << 8 ) + Rl;
+    word Z = core->ReadRegZ();
+    byte res = core->ReadReg(R1);
 
-    (*(core->Sram))[Z]=R1;
-
+    core->WriteSram(Z, res);
     /* Perform post-increment */
     Z += 1;
-    Rl=Z&0xff;
-    Rh=Z>>8;
 
+    core->WriteReg(30, Z & 0xff);
+    core->WriteReg(31, Z >> 8);
     return 2;
 }
 
-avr_op_SUB::avr_op_SUB
-(word opcode, AvrDevice *c):
+avr_op_SUB::avr_op_SUB(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode), get_rr_5(opcode)),
-    R1((*(core->R))[get_rd_5(opcode)]),
-    R2((*(core->R))[get_rr_5(opcode)]),
+    R1(get_rd_5(opcode)),
+    R2(get_rr_5(opcode)),
     status(core->status) 
 {}
 
 int avr_op_SUB::operator()() 
 {
-
-    byte rd = R1;
-    byte rr = R2;
-
+    byte rd = core->ReadReg(R1);
+    byte rr = core->ReadReg(R2);
     byte res = rd - rr;
 
     status->H = (get_sub_carry( res, rd, rr, 3 )) ;
@@ -2241,74 +1901,58 @@
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
     status->C = (get_sub_carry( res, rd, rr, 7 )) ;
-    R1=res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
 
 
-avr_op_SUBI::avr_op_SUBI
-(word opcode, AvrDevice *c):
+avr_op_SUBI::avr_op_SUBI(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_4(opcode), get_K_8(opcode)),
-    R1((*(core->R))[get_rd_4(opcode)]),
+    R1(get_rd_4(opcode)),
     status(core->status) ,
     K(get_K_8(opcode))
 {}
 
 int avr_op_SUBI::operator()() 
 {
-
-    byte rd = R1;
-
+    byte rd = core->ReadReg(R1);
     byte res = rd - K;
 
-
     status->H = (get_sub_carry( res, rd, K, 3 )) ;
     status->V = (get_sub_overflow( res, rd, K )) ;
     status->N = ((res >> 7) & 0x1) ;
     status->S = (status->N ^ status->V) ;
     status->Z = ((res & 0xff) == 0) ;
     status->C = (get_sub_carry( res, rd, K, 7 )) ;
-
-    R1= res;
-
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_SWAP::avr_op_SWAP
-(word opcode, AvrDevice *c):
+avr_op_SWAP::avr_op_SWAP(word opcode, AvrDevice *c):
     DecodedInstruction(c, get_rd_5(opcode),0),
-    R1((*(core->R))[get_rd_5(opcode)])
+    R1(get_rd_5(opcode))
 {}
 
 int avr_op_SWAP::operator()() 
 {
-
-
-    byte rd = R1;
-
-    R1= ((rd << 4) & 0xf0) | ((rd >> 4) & 0x0f) ;
-
-
+    byte rd = core->ReadReg(R1);
+    byte res = ((rd << 4) & 0xf0) | ((rd >> 4) & 0x0f);
+    core->WriteReg(R1, res);
     return 1;
 }
 
-avr_op_WDR::avr_op_WDR
-(word opcode, AvrDevice *c):
+avr_op_WDR::avr_op_WDR(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0)
 {}
 
 int avr_op_WDR::operator()() 
 {
-
     core->wado->Wdr();
-
     return 1;
 }
 
-avr_op_ILLEGAL::avr_op_ILLEGAL
-(word opcode, AvrDevice *c):
+avr_op_ILLEGAL::avr_op_ILLEGAL(word opcode, AvrDevice *c):
     DecodedInstruction(c, 0,0)
 {}
 
@@ -2398,7 +2042,7 @@
     return -1 * ((~val & mask) + 1);
 }
 
-
+/// Get register R24, 26, 28 or 30 - for ADIW and few other
 static int get_rd_2( word opcode )
 {
     int reg = ((opcode & mask_Rd_2) >> 4) & 0x3;
Index: decoder.h
===================================================================
--- decoder.h	(revision 852)
+++ decoder.h	(working copy)
@@ -38,12 +38,11 @@
 class DecodedInstruction {
     protected:
         AvrDevice *core;
-        int p1; //needed for trace
-        int p2; //needed for trace
         bool size2Word;
 
     public:
-        DecodedInstruction(AvrDevice *c, int _p1, int _p2, bool s2w=false): core(c),p1(_p1),p2(_p2),size2Word(s2w) {}
+        DecodedInstruction(AvrDevice *c, int _p1, int _p2, bool s2w=false)
+			: core(c), size2Word(s2w) {}
         virtual int operator()()=0; 
         virtual int Trace()=0;
         bool IsInstruction2Words() { return size2Word; } 
@@ -69,8 +68,8 @@
      * Num Clocks : 1
      */
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -91,8 +90,8 @@
      * Num Clocks : 1
      */
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -117,8 +116,8 @@
      */
 
     protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char Rl;
+        unsigned char Rh;
         unsigned char K;
         HWSreg *status;
 
@@ -141,8 +140,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        char R1;
+        char R2;
         HWSreg *status;
 
     public:
@@ -165,9 +164,9 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        unsigned char R1;
+		unsigned char K;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_ANDI (word opcode, AvrDevice *c);
@@ -188,7 +187,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        char R1;
         HWSreg *status;
 
     public:
@@ -211,7 +210,7 @@
 
     protected:
         HWSreg *status;
-        unsigned char K;
+        unsigned char Kbit;
 
     public:
         avr_op_BCLR (word opcode, AvrDevice *c);
@@ -232,9 +231,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        unsigned char Kadd;
-        unsigned char Kremove;
+        unsigned char R1;
+        unsigned char Kbit;
         HWSreg *status;
 
     public:
@@ -313,7 +311,7 @@
 
     protected:
         HWSreg *status;
-        unsigned char K;
+        unsigned char Kbit;
 
     public:
         avr_op_BSET (word opcode, AvrDevice *c);
@@ -334,9 +332,9 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        unsigned char R1;
+        unsigned char Kbit;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_BST (word opcode, AvrDevice *c);
@@ -379,9 +377,9 @@
      */
 
     protected:
-        RWMemoryMembers &ioreg;
+        unsigned char ioreg;
+		unsigned char K;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_CBI (word opcode, AvrDevice *c);
@@ -402,7 +400,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
         HWSreg *status;
 
     public:
@@ -424,8 +422,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -447,8 +445,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -470,9 +468,9 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
+        byte K;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_CPI (word opcode, AvrDevice *c);
@@ -494,8 +492,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -517,7 +515,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
         HWSreg *status;
 
     public:
@@ -539,10 +537,6 @@
      */
 #define EIND 0x10 //TODO
 
-    protected:
-        RWMemoryMembers &RL;
-        RWMemoryMembers &RH;
-        RWMemoryMembers &eind;
 
     public:
         avr_op_EICALL (word opcode, AvrDevice *c);
@@ -562,11 +556,6 @@
      * Num Clocks : 2
      */
 
-    protected:
-        RWMemoryMembers &RL;
-        RWMemoryMembers &RH;
-        RWMemoryMembers &eind;
-
     public:
         avr_op_EIJMP (word opcode, AvrDevice *c);
         int operator()();
@@ -586,9 +575,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &ZL;
-        RWMemoryMembers &ZH;
+        byte R1;
 
     public:
         avr_op_ELPM_Z (word opcode, AvrDevice *c);
@@ -609,9 +596,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &ZL;
-        RWMemoryMembers &ZH;
+        byte R1;
 
     public:
         avr_op_ELPM_Z_incr (word opcode, AvrDevice *c);
@@ -632,11 +617,6 @@
      * Num Clocks : 3
      */
 
-    protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &ZL;
-        RWMemoryMembers &ZH;
-
     public:
         avr_op_ELPM (word opcode, AvrDevice *c);
         int operator()();
@@ -656,8 +636,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -682,10 +662,10 @@
     //TODO
     //avr_error( "This opcode is not implemented yet: 0x%04x", opcode );
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
-        HWSreg *status;
+        unsigned char R1;
+        unsigned char R2;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_ESPM (word opcode, AvrDevice *c);
@@ -711,12 +691,10 @@
      */
 
     protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
-        HWSreg *status;
+        unsigned char Rd;
+        unsigned char Rr;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_FMUL (word opcode, AvrDevice *c);
@@ -737,10 +715,8 @@
      */
 
     protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
+        byte Rd;
+        byte Rr;
         HWSreg *status;
 
     public:
@@ -762,10 +738,8 @@
      */
 
     protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
+        byte Rd;
+        byte Rr;
         HWSreg *status;
 
     public:
@@ -786,11 +760,6 @@
      * Num Clocks : 3 / 4
      */
 
-    protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        unsigned char pc_bytes;
-
     public:
         avr_op_ICALL (word opcode, AvrDevice *c);
         int operator()();
@@ -809,12 +778,6 @@
      * Num Clocks : 2
      */
 
-    /* Z is R31:R30 */
-    /* Z is R31:R30 */
-    protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-
     public:
         avr_op_IJMP (word opcode, AvrDevice *c);
         int operator()();
@@ -834,8 +797,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &ioreg;
+        byte R1;
+        byte ioreg;
 
     public:
         avr_op_IN (word opcode, AvrDevice *c);
@@ -856,7 +819,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
         HWSreg *status;
 
     public:
@@ -899,9 +862,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        RWMemoryMembers &Rd;
+        unsigned char Rd;
         unsigned char K;
 
     public:
@@ -923,9 +884,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char Rd;
         unsigned char K;
 
     public:
@@ -947,7 +906,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        unsigned char R1;
         unsigned char K;
 
     public:
@@ -971,7 +930,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        unsigned char R1;
 
     public:
         avr_op_LDS (word opcode, AvrDevice *c);
@@ -992,10 +951,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        RWMemoryMembers &Rd;
-        HWSreg *status;
+        unsigned char Rd;
         unsigned char K;
 
     public:
@@ -1017,10 +973,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        HWSreg *status;
+        unsigned char Rd;
         unsigned char K;
 
     public:
@@ -1042,10 +995,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        HWSreg *status;
+        unsigned char Rd;
         unsigned char K;
 
     public:
@@ -1068,9 +1018,7 @@
 
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char Rd;
 
     public:
         avr_op_LD_Y_decr (word opcode, AvrDevice *c);
@@ -1091,9 +1039,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char Rd;
 
     public:
         avr_op_LD_Y_incr (word opcode, AvrDevice *c);
@@ -1114,9 +1060,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte Rd;
 
     public:
         avr_op_LD_Z_incr (word opcode, AvrDevice *c);
@@ -1139,9 +1083,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte Rd;
 
     public:
         avr_op_LD_Z_decr (word opcode, AvrDevice *c);
@@ -1162,9 +1104,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte Rd;
 
     public:
         avr_op_LPM_Z (word opcode, AvrDevice *c);
@@ -1186,14 +1126,6 @@
      */
     //return avr_op_LPM_Z:public DecodedInstruction
 
-
-
-    /* Z is R31:R30 */
-    protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-
     public:
         avr_op_LPM (word opcode, AvrDevice *c);
         int operator()();
@@ -1213,9 +1145,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte Rd;
 
     public:
         avr_op_LPM_Z_incr (word opcode, AvrDevice *c);
@@ -1236,7 +1166,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
+        byte Rd;
         HWSreg *status;
 
     public:
@@ -1257,8 +1187,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
 
     public:
         avr_op_MOV (word opcode, AvrDevice *c);
@@ -1279,12 +1209,8 @@
      */
 
     protected:
-        RWMemoryMembers &Rdl;
-        RWMemoryMembers &Rdh;
-        RWMemoryMembers &Rsl;
-        RWMemoryMembers &Rsh;
-        HWSreg *status;
-        unsigned char K;
+        word Rd;
+        word Rs;
 
     public:
         avr_op_MOVW (word opcode, AvrDevice *c);
@@ -1307,12 +1233,9 @@
      */
 
     protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
+        byte Rd;
+        byte Rr;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_MUL (word opcode, AvrDevice *c);
@@ -1333,12 +1256,9 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
+        byte Rd;
+        byte Rr;
         HWSreg *status;
-        unsigned char K;
 
     public:
         avr_op_MULS (word opcode, AvrDevice *c);
@@ -1362,10 +1282,8 @@
 
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
+        byte Rd;
+        byte Rr;
         HWSreg *status;
 
     public:
@@ -1387,7 +1305,7 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
+        byte Rd;
         HWSreg *status;
 
     public:
@@ -1428,10 +1346,10 @@
      */
 
     protected:
-        RWMemoryMembers &Rd;
-        RWMemoryMembers &Rr;
-        HWSreg *status;
+        unsigned char Rd;
+        unsigned char Rr;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_OR (word opcode, AvrDevice *c);
@@ -1452,9 +1370,9 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        HWSreg *status;
+        unsigned char R1;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_ORI (word opcode, AvrDevice *c);
@@ -1475,8 +1393,8 @@
      */
 
     protected:
-        RWMemoryMembers &ioreg;
-        RWMemoryMembers &R1;
+        byte ioreg;
+        byte R1;
 
     public:
         avr_op_OUT (word opcode, AvrDevice *c);
@@ -1497,7 +1415,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
 
     public:
         avr_op_POP (word opcode, AvrDevice *c);
@@ -1518,7 +1436,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
 
     public:
         avr_op_PUSH (word opcode, AvrDevice *c);
@@ -1620,7 +1538,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
         HWSreg *status;
 
     public:
@@ -1642,8 +1560,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -1665,9 +1583,9 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        HWSreg *status;
+        unsigned char R1;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_SBCI (word opcode, AvrDevice *c);
@@ -1688,7 +1606,7 @@
      */
 
     protected:
-        RWMemoryMembers &ioreg;
+        unsigned char ioreg;
         unsigned char K;
 
     public:
@@ -1710,7 +1628,7 @@
      */
 
     protected:
-        RWMemoryMembers &ioreg;
+        unsigned char ioreg;
         unsigned char K;
 
     public:
@@ -1732,7 +1650,7 @@
      */
 
     protected:
-        RWMemoryMembers &ioreg;
+        unsigned char ioreg;
         unsigned char K;
 
     public:
@@ -1754,10 +1672,9 @@
      */
 
     protected:
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
-        HWSreg *status;
+        unsigned char Rl;
         unsigned char K;
+        HWSreg *status;
 
     public:
         avr_op_SBIW (word opcode, AvrDevice *c);
@@ -1778,8 +1695,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        unsigned char K;
+        unsigned char R1;
+        unsigned char Kbit;
 
     public:
         avr_op_SBRC (word opcode, AvrDevice *c);
@@ -1800,8 +1717,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        unsigned char K;
+        unsigned char R1;
+        unsigned char Kbit;
 
     public:
         avr_op_SBRS (word opcode, AvrDevice *c);
@@ -1842,10 +1759,6 @@
      * Num Clocks : -
      */
 
-    protected:
-        RWMemoryMembers &R0;
-        RWMemoryMembers &R1;
-
     public:
         avr_op_SPM (word opcode, AvrDevice *c);
         int operator()();
@@ -1865,9 +1778,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char R1;
         unsigned char K;
 
     public:
@@ -1889,9 +1800,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        unsigned char R1;
         unsigned char K;
 
     public:
@@ -1913,7 +1822,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
 
     public:
         avr_op_STS (word opcode, AvrDevice *c);
@@ -1934,9 +1843,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_X (word opcode, AvrDevice *c);
@@ -1957,9 +1864,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_X_decr (word opcode, AvrDevice *c);
@@ -1980,9 +1885,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_X_incr (word opcode, AvrDevice *c);
@@ -2003,9 +1906,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_Y_decr (word opcode, AvrDevice *c);
@@ -2026,9 +1927,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_Y_incr (word opcode, AvrDevice *c);
@@ -2049,9 +1948,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_Z_decr (word opcode, AvrDevice *c);
@@ -2072,9 +1969,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &Rl;
-        RWMemoryMembers &Rh;
+        byte R1;
 
     public:
         avr_op_ST_Z_incr (word opcode, AvrDevice *c);
@@ -2095,8 +1990,8 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
-        RWMemoryMembers &R2;
+        byte R1;
+        byte R2;
         HWSreg *status;
 
     public:
@@ -2118,7 +2013,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        unsigned char R1;
         HWSreg *status;
         unsigned char K;
 
@@ -2141,7 +2036,7 @@
      */
 
     protected:
-        RWMemoryMembers &R1;
+        byte R1;
 
     public:
         avr_op_SWAP (word opcode, AvrDevice *c);
Index: decoder_trace.cpp
===================================================================
--- decoder_trace.cpp	(revision 855)
+++ decoder_trace.cpp	(working copy)
@@ -41,42 +41,42 @@
 #define MONSREG traceOut << (string)(*(core->status))  
 
 int avr_op_ADC::Trace()  {
-    traceOut << "ADC R" << p1 << ", R" << p2 << " ";
+    traceOut << "ADC R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ADD::Trace( ) {
-    traceOut << "ADD R" << p1 << ", R" << p2 << " ";
+    traceOut << "ADD R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ADIW::Trace( ) {
-    traceOut << "ADIW R" << p1 << ", " << p2 << " ";
+    traceOut << "ADIW R" << Rl << ", " << K << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_AND::Trace( ) {
-    traceOut << "AND R" << p1 << ", R" << p2 << " ";
+    traceOut << "AND R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ANDI::Trace( ) {
-    traceOut << "ANDI R" << p1 << ", " << HexChar(p2) << dec << " ";
+    traceOut << "ANDI R" << R1 << ", " << HexChar(K) << dec << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ASR::Trace( ) {
-    traceOut << "ASR R" << p1 ;
+    traceOut << "ASR R" << R1 ;
     int ret=this->operator()();
     MONSREG;
     return ret;
@@ -94,14 +94,14 @@
 };
 
 int avr_op_BCLR::Trace( ) {
-    traceOut << opcodes_bclr[p1] << " ";
+    traceOut << opcodes_bclr[Kbit] << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_BLD::Trace( ) {
-    traceOut << "BLD R" << p1 << ", " << p2 << " ";
+    traceOut << "BLD R" << R1 << ", " << Kbit << " ";
     int ret=this->operator()();
     return ret;
 }
@@ -118,12 +118,15 @@
 };
 
 int avr_op_BRBC::Trace( ) {
-    traceOut << branch_opcodes_clear[p1] << " ->" << HexShort((core->PC+1+p2)<<1) << dec << " ";
+    traceOut << branch_opcodes_clear[bitmask] << " " << HexShort(offset * 2) << dec << " ";
+    int oldPC = core->PC;
     int ret=this->operator()();
 
-    string sym(core->Flash->GetSymbolAtAddress(core->PC+1+p2));
-    traceOut << sym << " ";
-    for (int len = sym.length(); len<30;len++) { traceOut << " " ; }
+    string sym(core->Flash->GetSymbolAtAddress(core->PC * 2));
+    if(oldPC + 1 != core->PC) {
+        traceOut << sym << " ";
+        for (int len = sym.length(); len<30;len++) { traceOut << " " ; }
+    }
 
     return ret;
 }
@@ -140,12 +143,15 @@
 };
 
 int avr_op_BRBS::Trace( ) {
-    traceOut << branch_opcodes_set[p1] << " ->" << HexShort((core->PC+1+p2)<<1) << dec << " ";
+    traceOut << branch_opcodes_set[bitmask] << " " << HexShort(offset * 2) << dec << " ";
+    int oldPC = core->PC;
     int ret=this->operator()();
 
-    string sym(core->Flash->GetSymbolAtAddress(core->PC+1+p2));
-    traceOut << sym << " ";
-    for (int len = sym.length(); len<30;len++) { traceOut << " " ; }
+    string sym(core->Flash->GetSymbolAtAddress(core->PC * 2));
+    if(oldPC + 1 != core->PC) {
+        traceOut << sym << " ";
+        for (int len = sym.length(); len<30;len++) { traceOut << " " ; }
+    }
 
     return ret;
 }
@@ -162,67 +168,69 @@
 };
 
 int avr_op_BSET::Trace( ) {
-    traceOut << opcodes_bset[p1] << " ";
+    traceOut << opcodes_bset[Kbit] << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_BST::Trace( ) {
-    traceOut << "BST R" << p1 << ", " << p2 << " ";
+    traceOut << "BST R" << R1 << ", " << Kbit << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_CALL::Trace( ) {
-    traceOut << "CALL " << p1 << " ";
+    word K_lsb = core->Flash->GetWord((core->PC+1) * 2);
+    int k = KH << 16 | K_lsb;
+    traceOut << "CALL 0x" << hex << k*2 << dec << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_CBI::Trace( ) {
-    traceOut << "CBI " << HexChar(p1) << dec  << ", " << dec << p2 << " ";
+    traceOut << "CBI " << HexChar(ioreg) << dec  << ", " << dec << K << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_COM::Trace( ) {
-    traceOut << "COM R" << p1 << " ";
+    traceOut << "COM R" << R1 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_CP::Trace( ) {
-    traceOut << "CP R" << p1 << ", R" << p2 << " ";
+    traceOut << "CP R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_CPC::Trace( ) {
-    traceOut << "CPC R" << p1 << ", R" << p2 << " ";
+    traceOut << "CPC R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_CPI::Trace( ) {
-    traceOut << "CPI R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "CPI R" << R1 << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_CPSE::Trace( ) {
-    traceOut << "CPSE R" << p1 << ", R" << p2 << " ";
+    traceOut << "CPSE R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_DEC::Trace( ) {
-    traceOut << "DEC R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "DEC R" << R1 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
@@ -241,13 +249,10 @@
 }
 
 int avr_op_ELPM_Z::Trace( ) {
-    traceOut << "ELPM R" << p1 << ", Z " ;
+    traceOut << "ELPM R" << R1 << ", Z " ;
     int ret=this->operator()();
 
-    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) +
-        (((*(core->R))[31]) << 8) + 
-        (*(core->R))[30];
-
+    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) + core->ReadRegZ();
     unsigned int flash_addr = Z;// / 2;
 
     traceOut << " Flash[0x"<<hex<< (unsigned int) flash_addr<<"] ";
@@ -256,13 +261,10 @@
 }
 
 int avr_op_ELPM_Z_incr::Trace( ) {
-    traceOut << "ELPM R" << p1 << ", Z+ ";
+    traceOut << "ELPM R" << R1 << ", Z+ ";
     int ret=this->operator()();
 
-    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) +
-        (((*(core->R))[31]) << 8) + 
-        (*(core->R))[30];
-
+    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) + core->ReadRegZ();
     unsigned int flash_addr = Z; // / 2;
 
     traceOut << " Flash[0x"<<hex<< (unsigned int) flash_addr<<"] ";
@@ -276,9 +278,7 @@
     traceOut << "ELPM ";
     int ret=this->operator()();
 
-    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) +
-        (((*(core->R))[31]) << 8) + 
-        (*(core->R))[30];
+    unsigned int Z = ((core->GetRampz() & 0x3f) << 16) + core->ReadRegZ();
 
     unsigned int flash_addr = Z; // / 2;
 
@@ -289,59 +289,59 @@
 }
 
 int avr_op_EOR::Trace( ) {
-    traceOut << "EOR R" << p1 << ", R" << p2 << " ";
+    traceOut << "EOR R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ESPM::Trace( ) {
-    traceOut << "ESPM??? " << p1 << ", " << p2 << " ";
+    traceOut << "ESPM??? " << R1 << ", " << R2 << " ";  // missing in my datasheet rev-H
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_FMUL::Trace( ) {
-    traceOut << "FMUL R" << p1 << ", R" << p2 << " ";
+    traceOut << "FMUL R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_FMULS::Trace( ) {
-    traceOut << "FMULS R" << p1 << ", R" << p2 << " ";
+    traceOut << "FMULS R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_FMULSU::Trace( ) {
-    traceOut << "FMULSU R" << p1 << ", R" << p2 << " ";
+    traceOut << "FMULSU R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ICALL::Trace( ) {
-    traceOut << "ICALL " ;
+    traceOut << "ICALL Z " ;
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_IJMP::Trace( ) {
-    traceOut << "IJMP " ;
+    traceOut << "IJMP Z " ;
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_IN::Trace( ) {
-    traceOut << "IN R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "IN R" << R1 << ", " << HexChar(ioreg) << dec  << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_INC::Trace( ) {
-    traceOut << "INC R" << p1 << " ";
+    traceOut << "INC R" << R1 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
@@ -361,83 +361,82 @@
 }
 
 int avr_op_LDD_Y::Trace( ) {
-    traceOut << "LD R" << p1 << ", Y+"<<p2;
+    traceOut << "LD R" << Rd << ", Y+" << K;
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LDD_Z::Trace( ) {
-    traceOut << "LDD R" << p1 << ", Z ";
+    traceOut << "LDD R" << Rd << ", Z ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LDI::Trace( ) {
-    traceOut << "LDI R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "LDI R" << R1 << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LDS::Trace( ) {
     word offset = core->Flash->GetWord((core->PC+1)*2);  //this is k!
-    traceOut << "LDS R" << p1 << ", " << hex << "0x" << offset << dec  << " ";
+    traceOut << "LDS R" << R1 << ", " << hex << "0x" << offset << dec  << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_X::Trace( ) {
-    traceOut << "LD R" << p1 << ", X ";
+    traceOut << "LD R" << Rd << ", X ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_X_decr::Trace( ) {
-    traceOut << "LD R" << p1 << ", -X ";
+    traceOut << "LD R" << Rd << ", -X ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_X_incr::Trace( ) {
-    traceOut << "LD R" << p1 << ", X+ ";
+    traceOut << "LD R" << Rd << ", X+ ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_Y_decr::Trace( ) {
-    traceOut << "LD R" << p1 << ", -Y ";
+    traceOut << "LD R" << Rd << ", -Y ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_Y_incr::Trace( ) {
-    traceOut << "LD R" << p1 << ", Y+ " ;
+    traceOut << "LD R" << Rd << ", Y+ " ;
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_Z_incr::Trace( ) {
-    traceOut << "LD R" << p1 << ", Z+ ";
+    traceOut << "LD R" << Rd << ", Z+ ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LD_Z_decr::Trace( ) {
-    traceOut << "LD R" << p1 << ", -Z";
+    traceOut << "LD R" << Rd << ", -Z";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_LPM_Z::Trace( ) {
-    traceOut << "LPM_Z ";
+    traceOut << "LPM R" << Rd << ", Z ";
     int ret=this->operator()();
 
     /* Z is R31:R30 */
-    int Z = ((*(core->R))[ 31] << 8) + (*(core->R))[ 30];
+    int Z = core->ReadRegZ();
     //string sym(core->Flash->GetSymbolAtAddressLpm(Z));
     string sym(core->Flash->GetSymbolAtAddress(Z));
     traceOut << "FLASH[" << hex << Z << "," << sym << "] ";
 
-
     return ret;
 }
 
@@ -446,7 +445,7 @@
     int ret=this->operator()();
 
     /* Z is R31:R30 */
-    int Z = ((*(core->R))[ 31] << 8) + (*(core->R))[ 30];
+    int Z = core->ReadRegZ();
     //string sym(core->Flash->GetSymbolAtAddressLpm(Z));
     string sym(core->Flash->GetSymbolAtAddress(Z));
     traceOut << "FLASH[" << hex << Z << "," << sym << "] ";
@@ -455,10 +454,10 @@
 }
 
 int avr_op_LPM_Z_incr::Trace( ) {
-    traceOut << "LPM R" << p1 << ", Z+ " ;
+    traceOut << "LPM R" << Rd << ", Z+ " ;
     int ret=this->operator()();
     /* Z is R31:R30 */
-    int Z = ((*(core->R))[ 31] << 8) + (*(core->R))[ 30];
+    int Z = core->ReadRegZ();
     //string sym(core->Flash->GetSymbolAtAddressLpm(Z));
     string sym(core->Flash->GetSymbolAtAddress(Z));
     traceOut << "FLASH[" << hex << Z << "," << sym << "] ";
@@ -466,47 +465,47 @@
 }
 
 int avr_op_LSR::Trace( ) {
-    traceOut << "LSR R" << p1 << " ";
+    traceOut << "LSR R" << Rd << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_MOV::Trace( ) {
-    traceOut << "MOV R" << p1 << ", R" << p2 << " ";
+    traceOut << "MOV R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_MOVW::Trace( ) {
-    traceOut << "MOVW R" << p1 << ", R" << p2 << " ";
+    traceOut << "MOVW R" << Rd << ", R" << Rs << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_MUL::Trace( ) {
-    traceOut << "MUL R" << p1 << ", R" << p2 << " ";
+    traceOut << "MUL R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_MULS::Trace( ) {
-    traceOut << "MULS R" << p1 << ", R" << p2 << " ";
+    traceOut << "MULS R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_MULSU::Trace( ) {
-    traceOut << "MULSU R" << p1 << ", R" << p2 << " ";
+    traceOut << "MULSU R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_NEG::Trace( ) {
-    traceOut << "NEG R" << p1 <<" ";
+    traceOut << "NEG R" << Rd <<" ";
     int ret=this->operator()();
     MONSREG;
     return ret;
@@ -519,39 +518,39 @@
 }
 
 int avr_op_OR::Trace( ) {
-    traceOut << "OR R" << p1 << ", R" << p2 << " ";
+    traceOut << "OR R" << Rd << ", R" << Rr << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_ORI::Trace( ) {
-    traceOut << "ORI R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "ORI R" << R1 << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_OUT::Trace( ) {
-    traceOut << "OUT " << HexChar(p1) << dec  << ", R" << p2 << " ";
+    traceOut << "OUT " << HexChar(ioreg) << dec  << ", R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_POP::Trace( ) {
-    traceOut << "POP R" << p1 << " ";
+    traceOut << "POP R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_PUSH::Trace( ) {
-    traceOut << "PUSH R" << p1 << " ";
+    traceOut << "PUSH R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_RCALL::Trace( ) {
-    traceOut << "RCALL " << hex << ((core->PC+p1+1)<<1) << dec  << " ";
+    traceOut << "RCALL " << hex << ((core->PC+K+1)<<1) << dec  << " ";
     int ret=this->operator()();
     return ret;
 }
@@ -569,65 +568,65 @@
 }
 
 int avr_op_RJMP::Trace( ) {
-    traceOut << "RJMP " << hex << ((core->PC+p1+1)<<1) << dec  << " ";
+    traceOut << "RJMP " << hex << ((core->PC+K+1)<<1) << dec  << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ROR::Trace( ) {
-    traceOut << "ROR R" << p1 << " ";
+    traceOut << "ROR R" << R1 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SBC::Trace( ) {
-    traceOut << "SBC R" << p1 << ", R" << p2 << " ";
+    traceOut << "SBC R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SBCI::Trace( ) {
-    traceOut << "SBCI R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "SBCI R" << R1 << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SBI::Trace( ) {
-    traceOut << "SBI " << HexChar(p1) << dec  << ", " << dec << p2 << " ";
+    traceOut << "SBI " << HexChar(ioreg) << dec  << ", " << dec << K << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_SBIC::Trace( ) {
-    traceOut << "SBIC " << HexChar(p1) << dec  << ", " << dec << p2 << " ";
+    traceOut << "SBIC " << HexChar(ioreg) << dec  << ", " << dec << K << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_SBIS::Trace( ) {
-    traceOut << "SBIS " << HexChar(p1) << dec  << ", " << dec << p2 << " ";
+    traceOut << "SBIS " << HexChar(ioreg) << dec  << ", " << dec << K << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_SBIW::Trace( ) {
-    traceOut << "SBIW R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "SBIW R" << Rl << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SBRC::Trace( ) {
-    traceOut << "SBRC R" << p1 << ", " << p2 << " ";
+    traceOut << "SBRC R" << R1 << ", " << Kbit << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_SBRS::Trace( ) {
-    traceOut << "SBRS R" << p1 << ", " << p2 << " ";
+    traceOut << "SBRS R" << R1 << ", " << Kbit << " ";
     int ret=this->operator()();
     return ret;
 }
@@ -645,82 +644,82 @@
 }
 
 int avr_op_STD_Y::Trace( ) {
-    traceOut << "STD Y+"<<p1 <<", R" << p2 << " ";
+    traceOut << "STD Y+" << K << ", R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_STD_Z::Trace( ) {
-    traceOut << "STD Z, R" << p1 << " ";
+    traceOut << "STD Z, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_STS::Trace( ) {
     word offset = core->Flash->GetWord((core->PC+1)*2);  //this is k!
-    traceOut << "STS " << "0x" << hex << offset << dec  << ", R" << p2 << " ";
+    traceOut << "STS " << "0x" << hex << offset << dec  << ", R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_X::Trace( ) {
-    traceOut << "ST X, R" << p1 << " ";
+    traceOut << "ST X, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_X_decr::Trace( ) {
-    traceOut << "ST -X, R" << p1 << " ";
+    traceOut << "ST -X, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_X_incr::Trace( ) {
-    traceOut << "ST X+, R" << p1 << " ";
+    traceOut << "ST X+, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_Y_decr::Trace( ) {
-    traceOut << "ST -Y, R" << p1 << " ";
+    traceOut << "ST -Y, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_Y_incr::Trace( ) {
-    traceOut << "ST Y+, R" << p1 << " ";
+    traceOut << "ST Y+, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_Z_decr::Trace( ) {
-    traceOut << "ST -Z, R" << p1 << " ";
+    traceOut << "ST -Z, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_ST_Z_incr::Trace( ) {
-    traceOut << "ST Z+, R" << p1 << " ";
+    traceOut << "ST Z+, R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
 
 int avr_op_SUB::Trace( ) {
-    traceOut << "SUB R" << p1 << ", R" << p2 << " ";
+    traceOut << "SUB R" << R1 << ", R" << R2 << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SUBI::Trace( ) {
-    traceOut << "SUBI R" << p1 << ", " << HexChar(p2) << dec  << " ";
+    traceOut << "SUBI R" << R1 << ", " << HexChar(K) << dec  << " ";
     int ret=this->operator()();
     MONSREG;
     return ret;
 }
 
 int avr_op_SWAP::Trace( ) {
-    traceOut << "SWAP R" << p1 << " ";
+    traceOut << "SWAP R" << R1 << " ";
     int ret=this->operator()();
     return ret;
 }
Index: gdbserver.cpp
===================================================================
--- gdbserver.cpp	(revision 862)
+++ gdbserver.cpp	(working copy)
@@ -386,7 +386,7 @@
     /* 32 gen purpose working registers */
     for ( i=0; i<32; i++ )
     {
-        val = (*(core->R))[i];
+        val = core->ReadReg(i);
         buf[i*2]   = HEX_DIGIT[(val >> 4) & 0xf];
         buf[i*2+1] = HEX_DIGIT[val & 0xf];
     }
@@ -448,8 +448,7 @@
     {
         bval  = hex2nib(*pkt++) << 4;
         bval += hex2nib(*pkt++);
-        (*(core->R))[i]=bval;
-
+        core->WriteReg(i, bval);
     }
 
     /* GDB thinks SREG is register number 32 */
@@ -533,7 +532,7 @@
 
     if ( (reg >= 0) && (reg < 32) )
     {                           /* general regs */
-        byte val = (*(core->R))[reg];
+        byte val = core->ReadReg(reg);
         _snprintf_s( reply, sizeof(reply)-1, _TRUNCATE, "%02x", val );
     }
     else if (reg == 32)         /* sreg */
@@ -593,7 +592,7 @@
         }
         else
         {
-            (*(core->R))[reg]=val&0xff;
+            core->WriteReg(reg, val & 0xff);
         }
     }
     else if (reg == 33)
@@ -714,7 +713,8 @@
         {
             for ( i=0; i<len; i++ )
             {
-                bval = (*(core->Sram))[addr+i];
+                bval = (addr + i < 32) ? core->ReadReg(addr + i)
+                    : core->ReadSram(addr + i);
                 buf[i*2]   = HEX_DIGIT[bval >> 4];
                 buf[i*2+1] = HEX_DIGIT[bval & 0xf];
             }
@@ -823,7 +823,7 @@
             {
                 bval  = hex2nib(*pkt++) << 4;
                 bval += hex2nib(*pkt++);
-                (*(core->Sram))[i]=bval;
+                core->WriteSram(i, bval);
             }
         }
     }
Index: hwstack.cpp
===================================================================
--- hwstack.cpp	(revision 852)
+++ hwstack.cpp	(working copy)
@@ -67,12 +67,11 @@
 } 
 
 
-HWStack::HWStack(AvrDevice *c, MemoryOffsets *sr, unsigned int mask)
+HWStack::HWStack(AvrDevice *c, unsigned int mask)
 	: Hardware(c)
 	, core(c)
 {
     stackMask=mask;
-	mem=sr;
 	Reset();
 }
 
@@ -91,7 +90,7 @@
 }
 
 void HWStack::Push(unsigned char val){
-	(*mem)[stackPointer]=val;
+    core->WriteSram(stackPointer, val);
 	stackPointer--;
     stackPointer&=stackMask;
 	if (core->trace_on==1) traceOut << "SP=0x" << hex << stackPointer << dec << " " ;
@@ -102,7 +101,7 @@
     stackPointer&=stackMask;
 	if (core->trace_on==1) traceOut << "SP=0x" << hex << stackPointer << dec << " " ;
     CheckBreakPoints();
-	return (*mem)[stackPointer];
+	return core->ReadSram(stackPointer);
 }
 
 void HWStack::SetSpl(unsigned char val) {
Index: hwstack.h
===================================================================
--- hwstack.h	(revision 852)
+++ hwstack.h	(working copy)
@@ -38,7 +38,6 @@
 class HWStack: public Hardware {
 	protected:
         AvrDevice *core;
-		MemoryOffsets *mem;
 		unsigned int stackPointer;
         unsigned int stackMask;
 		/// map 'stack  address' -> Funktor*
@@ -46,7 +45,7 @@
 
 	public:
         //the mask give the max width of the stack pointer, in smaller devices there are not all 16 bits available!
-		HWStack(AvrDevice *core, MemoryOffsets *sr, unsigned int mask);
+		HWStack(AvrDevice *core, unsigned int mask);
 		void Push(unsigned char val);
 		unsigned char Pop();
 
