163 |
|
|
164 |
/* Wait for the PIT to wrap around. ??? make this inline? */ |
/* Wait for the PIT to wrap around. ??? make this inline? */ |
165 |
|
|
166 |
|
#if !IN_BOCHS |
167 |
static void |
static void |
168 |
wait_pit_wrap (void) |
wait_pit_wrap (void) |
169 |
{ |
{ |
182 |
break; |
break; |
183 |
} |
} |
184 |
} |
} |
185 |
|
#endif |
186 |
|
|
187 |
static void |
static void |
188 |
calibrate_delay (void) |
calibrate_delay (void) |
237 |
static void |
static void |
238 |
calibrate_apic_timer (int this_cpu) |
calibrate_apic_timer (int this_cpu) |
239 |
{ |
{ |
240 |
|
#if !IN_BOCHS |
241 |
unsigned long long start_perf, end_perf; |
unsigned long long start_perf, end_perf; |
242 |
|
#endif |
243 |
unsigned int bus_speed, core_speed; |
unsigned int bus_speed, core_speed; |
244 |
unsigned int apic_count, nreg; |
#if !IN_BOCHS |
245 |
|
unsigned int apic_count; |
246 |
|
#endif |
247 |
|
unsigned int nreg; |
248 |
|
|
249 |
#define APIC_TDCR_MASK 0x0f |
#define APIC_TDCR_MASK 0x0f |
250 |
#define APIC_TDR_DIV_1 0x0b |
#define APIC_TDR_DIV_1 0x0b |
259 |
outb (0x40, 0xff); |
outb (0x40, 0xff); |
260 |
outb (0x40, 0xff); |
outb (0x40, 0xff); |
261 |
|
|
262 |
#if 0 |
#if !IN_BOCHS |
263 |
wait_pit_wrap (); |
wait_pit_wrap (); |
264 |
apic_write (APIC_TMICT, ~0); // Start APIC timer |
apic_write (APIC_TMICT, ~0); // Start APIC timer |
265 |
start_perf = read_pentium_clock(); |
start_perf = read_pentium_clock(); |
266 |
wait_pit_wrap(); |
wait_pit_wrap(); |
267 |
apic_count = apic_read (APIC_TMCCT); |
apic_count = apic_read (APIC_TMCCT); |
268 |
end_perf = read_pentium_clock(); |
end_perf = read_pentium_clock(); |
|
#endif |
|
269 |
|
|
270 |
bus_speed = |
bus_speed = |
271 |
(unsigned int) ((unsigned long long) PIT_CLKNUM |
(unsigned int) ((unsigned long long) PIT_CLKNUM |
274 |
(unsigned int) ((unsigned long long) PIT_CLKNUM |
(unsigned int) ((unsigned long long) PIT_CLKNUM |
275 |
* (end_perf - start_perf) / 0xffff); |
* (end_perf - start_perf) / 0xffff); |
276 |
|
|
277 |
|
#else |
278 |
/* ??? hardcoded to 66 MHz, since the probe thing does not seem to work. */ |
/* ??? hardcoded to 66 MHz, since the probe thing does not seem to work. */ |
279 |
|
|
280 |
bus_speed = core_speed = 66000000; |
bus_speed = core_speed = 6600000; |
281 |
apic_timer_ticks_per_sec = bus_speed; |
apic_timer_ticks_per_sec = bus_speed; |
282 |
|
#endif |
283 |
|
|
284 |
printf ("cpu #%d runs at %d/%d MHz\n", this_cpu, |
printf ("cpu #%d runs at %d/%d MHz\n", this_cpu, |
285 |
(bus_speed + 500000) / 1000000, (core_speed + 500000) / 1000000); |
(bus_speed + 500000) / 1000000, (core_speed + 500000) / 1000000); |
401 |
struct processor *processor; |
struct processor *processor; |
402 |
int tss_seg; |
int tss_seg; |
403 |
|
|
|
/* Record our CPU id in the processor structure. */ |
|
|
PROCESSOR_CURRENT()->cpu_id = CPU_CURRENT (); |
|
|
|
|
404 |
/* Tell bootstrap CPU that we are done. */ |
/* Tell bootstrap CPU that we are done. */ |
405 |
|
|
406 |
spin_unlock (&cpudone_lock); |
spin_unlock (&cpudone_lock); |
422 |
/* Load first thread into processor. */ |
/* Load first thread into processor. */ |
423 |
|
|
424 |
processor = PROCESSOR_CURRENT (); |
processor = PROCESSOR_CURRENT (); |
425 |
|
processor->cpu_id = CPU_CURRENT (); |
426 |
LOAD_CONTEXT ((struct thread *) thread_select (processor)); |
LOAD_CONTEXT ((struct thread *) thread_select (processor)); |
427 |
} |
} |
428 |
|
|
458 |
apic_write (APIC_SIVR, reg); |
apic_write (APIC_SIVR, reg); |
459 |
|
|
460 |
this_cpu = CPU_CURRENT (); |
this_cpu = CPU_CURRENT (); |
461 |
|
PROCESSOR_N (this_cpu)->cpu_id = this_cpu; |
462 |
|
|
463 |
calibrate_delay (); |
calibrate_delay (); |
464 |
calibrate_apic_timer (this_cpu); |
calibrate_apic_timer (this_cpu); |