655 |
/* generate intermediate code in gen_opc_buf and gen_opparam_buf for |
/* generate intermediate code in gen_opc_buf and gen_opparam_buf for |
656 |
basic block 'tb'. If search_pc is TRUE, also generate PC |
basic block 'tb'. If search_pc is TRUE, also generate PC |
657 |
information for each intermediate instruction. */ |
information for each intermediate instruction. */ |
658 |
int gen_intermediate_code(TranslationBlock *tb, int search_pc) |
static inline int gen_intermediate_code_internal(TranslationBlock *tb, int search_pc) |
659 |
{ |
{ |
660 |
DisasContext dc1, *dc = &dc1; |
DisasContext dc1, *dc = &dc1; |
661 |
uint16_t *gen_opc_end; |
uint16_t *gen_opc_end; |
717 |
return 0; |
return 0; |
718 |
} |
} |
719 |
|
|
720 |
|
int gen_intermediate_code(TranslationBlock *tb) |
721 |
|
{ |
722 |
|
return gen_intermediate_code_internal(tb, 0); |
723 |
|
} |
724 |
|
|
725 |
|
int gen_intermediate_code_pc(TranslationBlock *tb) |
726 |
|
{ |
727 |
|
return gen_intermediate_code_internal(tb, 1); |
728 |
|
} |
729 |
|
|
730 |
CPUARMState *cpu_arm_init(void) |
CPUARMState *cpu_arm_init(void) |
731 |
{ |
{ |
732 |
CPUARMState *env; |
CPUARMState *env; |