230 |
return 1; |
return 1; |
231 |
} |
} |
232 |
} |
} |
233 |
#else |
|
234 |
|
target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) |
235 |
|
{ |
236 |
|
target_phys_addr_t pde_ptr; |
237 |
|
uint32_t pde; |
238 |
|
|
239 |
|
/* Context base + context number */ |
240 |
|
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); |
241 |
|
pde = ldl_phys(pde_ptr); |
242 |
|
|
243 |
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
244 |
|
default: |
245 |
|
case 0: /* Invalid */ |
246 |
|
case 2: /* PTE, maybe should not happen? */ |
247 |
|
case 3: /* Reserved */ |
248 |
|
return 0; |
249 |
|
case 1: /* L1 PDE */ |
250 |
|
if (mmulev == 3) |
251 |
|
return pde; |
252 |
|
pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); |
253 |
|
pde = ldl_phys(pde_ptr); |
254 |
|
|
255 |
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
256 |
|
default: |
257 |
|
case 0: /* Invalid */ |
258 |
|
case 3: /* Reserved */ |
259 |
|
return 0; |
260 |
|
case 2: /* L1 PTE */ |
261 |
|
return pde; |
262 |
|
case 1: /* L2 PDE */ |
263 |
|
if (mmulev == 2) |
264 |
|
return pde; |
265 |
|
pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); |
266 |
|
pde = ldl_phys(pde_ptr); |
267 |
|
|
268 |
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
269 |
|
default: |
270 |
|
case 0: /* Invalid */ |
271 |
|
case 3: /* Reserved */ |
272 |
|
return 0; |
273 |
|
case 2: /* L2 PTE */ |
274 |
|
return pde; |
275 |
|
case 1: /* L3 PDE */ |
276 |
|
if (mmulev == 1) |
277 |
|
return pde; |
278 |
|
pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); |
279 |
|
pde = ldl_phys(pde_ptr); |
280 |
|
|
281 |
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
282 |
|
default: |
283 |
|
case 0: /* Invalid */ |
284 |
|
case 1: /* PDE, should not happen */ |
285 |
|
case 3: /* Reserved */ |
286 |
|
return 0; |
287 |
|
case 2: /* L3 PTE */ |
288 |
|
return pde; |
289 |
|
} |
290 |
|
} |
291 |
|
} |
292 |
|
} |
293 |
|
return 0; |
294 |
|
} |
295 |
|
|
296 |
|
#ifdef DEBUG_MMU |
297 |
|
void dump_mmu(CPUState *env) |
298 |
|
{ |
299 |
|
target_ulong va, va1, va2; |
300 |
|
unsigned int n, m, o; |
301 |
|
target_phys_addr_t pde_ptr, pa; |
302 |
|
uint32_t pde; |
303 |
|
|
304 |
|
printf("MMU dump:\n"); |
305 |
|
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); |
306 |
|
pde = ldl_phys(pde_ptr); |
307 |
|
printf("Root ptr: " TARGET_FMT_lx ", ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]); |
308 |
|
for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { |
309 |
|
pde_ptr = mmu_probe(env, va, 2); |
310 |
|
if (pde_ptr) { |
311 |
|
pa = cpu_get_phys_page_debug(env, va); |
312 |
|
printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va, pa, pde_ptr); |
313 |
|
for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) { |
314 |
|
pde_ptr = mmu_probe(env, va1, 1); |
315 |
|
if (pde_ptr) { |
316 |
|
pa = cpu_get_phys_page_debug(env, va1); |
317 |
|
printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va1, pa, pde_ptr); |
318 |
|
for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) { |
319 |
|
pde_ptr = mmu_probe(env, va2, 0); |
320 |
|
if (pde_ptr) { |
321 |
|
pa = cpu_get_phys_page_debug(env, va2); |
322 |
|
printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PTE: " TARGET_FMT_lx "\n", va2, pa, pde_ptr); |
323 |
|
} |
324 |
|
} |
325 |
|
} |
326 |
|
} |
327 |
|
} |
328 |
|
} |
329 |
|
printf("MMU dump ends\n"); |
330 |
|
} |
331 |
|
#endif /* DEBUG_MMU */ |
332 |
|
|
333 |
|
#else /* !TARGET_SPARC64 */ |
334 |
/* |
/* |
335 |
* UltraSparc IIi I/DMMUs |
* UltraSparc IIi I/DMMUs |
336 |
*/ |
*/ |
482 |
return 1; |
return 1; |
483 |
} |
} |
484 |
|
|
|
#endif |
|
|
#endif |
|
|
|
|
|
void memcpy32(target_ulong *dst, const target_ulong *src) |
|
|
{ |
|
|
dst[0] = src[0]; |
|
|
dst[1] = src[1]; |
|
|
dst[2] = src[2]; |
|
|
dst[3] = src[3]; |
|
|
dst[4] = src[4]; |
|
|
dst[5] = src[5]; |
|
|
dst[6] = src[6]; |
|
|
dst[7] = src[7]; |
|
|
} |
|
|
|
|
|
#if !defined(TARGET_SPARC64) |
|
|
target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) |
|
|
{ |
|
|
target_phys_addr_t pde_ptr; |
|
|
uint32_t pde; |
|
|
|
|
|
/* Context base + context number */ |
|
|
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); |
|
|
pde = ldl_phys(pde_ptr); |
|
|
|
|
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
|
|
default: |
|
|
case 0: /* Invalid */ |
|
|
case 2: /* PTE, maybe should not happen? */ |
|
|
case 3: /* Reserved */ |
|
|
return 0; |
|
|
case 1: /* L1 PDE */ |
|
|
if (mmulev == 3) |
|
|
return pde; |
|
|
pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); |
|
|
pde = ldl_phys(pde_ptr); |
|
|
|
|
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
|
|
default: |
|
|
case 0: /* Invalid */ |
|
|
case 3: /* Reserved */ |
|
|
return 0; |
|
|
case 2: /* L1 PTE */ |
|
|
return pde; |
|
|
case 1: /* L2 PDE */ |
|
|
if (mmulev == 2) |
|
|
return pde; |
|
|
pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); |
|
|
pde = ldl_phys(pde_ptr); |
|
|
|
|
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
|
|
default: |
|
|
case 0: /* Invalid */ |
|
|
case 3: /* Reserved */ |
|
|
return 0; |
|
|
case 2: /* L2 PTE */ |
|
|
return pde; |
|
|
case 1: /* L3 PDE */ |
|
|
if (mmulev == 1) |
|
|
return pde; |
|
|
pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); |
|
|
pde = ldl_phys(pde_ptr); |
|
|
|
|
|
switch (pde & PTE_ENTRYTYPE_MASK) { |
|
|
default: |
|
|
case 0: /* Invalid */ |
|
|
case 1: /* PDE, should not happen */ |
|
|
case 3: /* Reserved */ |
|
|
return 0; |
|
|
case 2: /* L3 PTE */ |
|
|
return pde; |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
return 0; |
|
|
} |
|
|
|
|
|
#ifdef DEBUG_MMU |
|
|
void dump_mmu(CPUState *env) |
|
|
{ |
|
|
target_ulong va, va1, va2; |
|
|
unsigned int n, m, o; |
|
|
target_phys_addr_t pde_ptr, pa; |
|
|
uint32_t pde; |
|
|
|
|
|
printf("MMU dump:\n"); |
|
|
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); |
|
|
pde = ldl_phys(pde_ptr); |
|
|
printf("Root ptr: " TARGET_FMT_lx ", ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]); |
|
|
for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { |
|
|
pde_ptr = mmu_probe(env, va, 2); |
|
|
if (pde_ptr) { |
|
|
pa = cpu_get_phys_page_debug(env, va); |
|
|
printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va, pa, pde_ptr); |
|
|
for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) { |
|
|
pde_ptr = mmu_probe(env, va1, 1); |
|
|
if (pde_ptr) { |
|
|
pa = cpu_get_phys_page_debug(env, va1); |
|
|
printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va1, pa, pde_ptr); |
|
|
for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) { |
|
|
pde_ptr = mmu_probe(env, va2, 0); |
|
|
if (pde_ptr) { |
|
|
pa = cpu_get_phys_page_debug(env, va2); |
|
|
printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PTE: " TARGET_FMT_lx "\n", va2, pa, pde_ptr); |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
} |
|
|
printf("MMU dump ends\n"); |
|
|
} |
|
|
#endif |
|
|
#else |
|
485 |
#ifdef DEBUG_MMU |
#ifdef DEBUG_MMU |
486 |
void dump_mmu(CPUState *env) |
void dump_mmu(CPUState *env) |
487 |
{ |
{ |
553 |
} |
} |
554 |
} |
} |
555 |
} |
} |
556 |
#endif |
#endif /* DEBUG_MMU */ |
557 |
#endif |
|
558 |
|
#endif /* TARGET_SPARC64 */ |
559 |
|
#endif /* !CONFIG_USER_ONLY */ |
560 |
|
|
561 |
|
void memcpy32(target_ulong *dst, const target_ulong *src) |
562 |
|
{ |
563 |
|
dst[0] = src[0]; |
564 |
|
dst[1] = src[1]; |
565 |
|
dst[2] = src[2]; |
566 |
|
dst[3] = src[3]; |
567 |
|
dst[4] = src[4]; |
568 |
|
dst[5] = src[5]; |
569 |
|
dst[6] = src[6]; |
570 |
|
dst[7] = src[7]; |
571 |
|
} |