325 |
RET_INVAL(ctx); |
RET_INVAL(ctx); |
326 |
} |
} |
327 |
|
|
|
/* Special opcode to stop emulation */ |
|
|
GEN_HANDLER(stop, 0x06, 0x00, 0xFF, 0x03FFFFC1, PPC_COMMON) |
|
|
{ |
|
|
RET_EXCP(ctx, EXCP_HLT, 0); |
|
|
} |
|
|
|
|
328 |
static opc_handler_t invalid_handler = { |
static opc_handler_t invalid_handler = { |
329 |
.inval = 0xFFFFFFFF, |
.inval = 0xFFFFFFFF, |
330 |
.type = PPC_NONE, |
.type = PPC_NONE, |
861 |
GEN_FLOAT_AB(sub, 0x14, 0x000007C0); |
GEN_FLOAT_AB(sub, 0x14, 0x000007C0); |
862 |
/* Optional: */ |
/* Optional: */ |
863 |
/* fsqrt */ |
/* fsqrt */ |
864 |
GEN_FLOAT_BS(sqrt, 0x3F, 0x16); |
GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT) |
865 |
|
{ |
866 |
|
if (!ctx->fpu_enabled) { |
867 |
|
RET_EXCP(ctx, EXCP_NO_FP, 0); |
868 |
|
return; |
869 |
|
} |
870 |
|
gen_op_reset_scrfx(); |
871 |
|
gen_op_load_fpr_FT0(rB(ctx->opcode)); |
872 |
|
gen_op_fsqrt(); |
873 |
|
gen_op_store_FT0_fpr(rD(ctx->opcode)); |
874 |
|
if (Rc(ctx->opcode)) |
875 |
|
gen_op_set_Rc1(); |
876 |
|
} |
877 |
|
|
878 |
GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT) |
GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_OPT) |
879 |
{ |
{ |
1440 |
|
|
1441 |
/*** Floating-point load ***/ |
/*** Floating-point load ***/ |
1442 |
#define GEN_LDF(width, opc) \ |
#define GEN_LDF(width, opc) \ |
1443 |
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \ |
GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
1444 |
{ \ |
{ \ |
1445 |
uint32_t simm = SIMM(ctx->opcode); \ |
uint32_t simm = SIMM(ctx->opcode); \ |
1446 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1459 |
} |
} |
1460 |
|
|
1461 |
#define GEN_LDUF(width, opc) \ |
#define GEN_LDUF(width, opc) \ |
1462 |
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \ |
GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
1463 |
{ \ |
{ \ |
1464 |
uint32_t simm = SIMM(ctx->opcode); \ |
uint32_t simm = SIMM(ctx->opcode); \ |
1465 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1480 |
} |
} |
1481 |
|
|
1482 |
#define GEN_LDUXF(width, opc) \ |
#define GEN_LDUXF(width, opc) \ |
1483 |
GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \ |
GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \ |
1484 |
{ \ |
{ \ |
1485 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1486 |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
1500 |
} |
} |
1501 |
|
|
1502 |
#define GEN_LDXF(width, opc2, opc3) \ |
#define GEN_LDXF(width, opc2, opc3) \ |
1503 |
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \ |
GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \ |
1504 |
{ \ |
{ \ |
1505 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1506 |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
1531 |
|
|
1532 |
/*** Floating-point store ***/ |
/*** Floating-point store ***/ |
1533 |
#define GEN_STF(width, opc) \ |
#define GEN_STF(width, opc) \ |
1534 |
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \ |
GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
1535 |
{ \ |
{ \ |
1536 |
uint32_t simm = SIMM(ctx->opcode); \ |
uint32_t simm = SIMM(ctx->opcode); \ |
1537 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1550 |
} |
} |
1551 |
|
|
1552 |
#define GEN_STUF(width, opc) \ |
#define GEN_STUF(width, opc) \ |
1553 |
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) \ |
GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
1554 |
{ \ |
{ \ |
1555 |
uint32_t simm = SIMM(ctx->opcode); \ |
uint32_t simm = SIMM(ctx->opcode); \ |
1556 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1570 |
} |
} |
1571 |
|
|
1572 |
#define GEN_STUXF(width, opc) \ |
#define GEN_STUXF(width, opc) \ |
1573 |
GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_INTEGER) \ |
GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \ |
1574 |
{ \ |
{ \ |
1575 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1576 |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
1589 |
} |
} |
1590 |
|
|
1591 |
#define GEN_STXF(width, opc2, opc3) \ |
#define GEN_STXF(width, opc2, opc3) \ |
1592 |
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_INTEGER) \ |
GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \ |
1593 |
{ \ |
{ \ |
1594 |
if (!ctx->fpu_enabled) { \ |
if (!ctx->fpu_enabled) { \ |
1595 |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
RET_EXCP(ctx, EXCP_NO_FP, 0); \ |
2376 |
|
|
2377 |
/* Optional: */ |
/* Optional: */ |
2378 |
/* dcba */ |
/* dcba */ |
2379 |
GEN_HANDLER(dcba, 0x1F, 0x16, 0x07, 0x03E00001, PPC_CACHE_OPT) |
GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_OPT) |
2380 |
{ |
{ |
2381 |
} |
} |
2382 |
|
|