/[qemu]/qemu/target-mips/cpu.h
ViewVC logotype

Diff of /qemu/target-mips/cpu.h

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

revision 1.2 by bellard, Mon Jul 4 22:17:32 2005 UTC revision 1.3 by bellard, Sun Nov 20 10:29:33 2005 UTC
# Line 162  struct CPUMIPSState { Line 162  struct CPUMIPSState {
162  #define MIPS_HFLAG_BR     0x0800 /* branch to register (can't link TB) */  #define MIPS_HFLAG_BR     0x0800 /* branch to register (can't link TB) */
163      target_ulong btarget;        /* Jump / branch target               */      target_ulong btarget;        /* Jump / branch target               */
164      int bcond;                   /* Branch condition (if needed)       */      int bcond;                   /* Branch condition (if needed)       */
165      struct TranslationBlock *current_tb; /* currently executing TB  */  
166      /* soft mmu support */      CPU_COMMON
     /* in order to avoid passing too many arguments to the memory  
        write helpers, we store some rarely used information in the CPU  
        context) */  
     target_ulong mem_write_pc; /* host pc at which the memory was  
                                    written */  
     unsigned long mem_write_vaddr; /* target virtual addr at which the  
                                       memory was written */  
     /* 0 = kernel, 1 = user (may have 2 = kernel code, 3 = user code ?) */  
     CPUTLBEntry tlb_read[2][CPU_TLB_SIZE];  
     CPUTLBEntry tlb_write[2][CPU_TLB_SIZE];  
     /* ice debug support */  
     target_ulong breakpoints[MAX_BREAKPOINTS];  
     int nb_breakpoints;  
     int singlestep_enabled; /* XXX: should use CPU single step mode instead */  
     /* user data */  
     void *opaque;  
167  };  };
168    
169  #include "cpu-all.h"  #include "cpu-all.h"

Legend:
Removed from v.1.2  
changed lines
  Added in v.1.3

savannah-hackers-public@gnu.org
ViewVC Help
Powered by ViewVC 1.1.26