600 |
{\ |
{\ |
601 |
gen_op_shldw ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
gen_op_shldw ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
602 |
gen_op_shrdw ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
gen_op_shrdw ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
603 |
},\ |
},\ |
604 |
{\ |
{\ |
605 |
gen_op_shldl ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
gen_op_shldl ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
606 |
gen_op_shrdl ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
gen_op_shrdl ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
607 |
},\ |
},\ |
608 |
{\ |
{\ |
609 |
|
X86_64_DEF(gen_op_shldq ## SUFFIX ## _T0_T1_ ## op ## _cc,\ |
610 |
|
gen_op_shrdq ## SUFFIX ## _T0_T1_ ## op ## _cc,)\ |
611 |
}, |
}, |
612 |
|
|
613 |
static GenOpFunc1 *gen_op_shiftd_T0_T1_im_cc[4][2] = { |
static GenOpFunc1 *gen_op_shiftd_T0_T1_im_cc[4][2] = { |
2725 |
sse_op2(op2_offset, op1_offset); |
sse_op2(op2_offset, op1_offset); |
2726 |
break; |
break; |
2727 |
case 0x050: /* movmskps */ |
case 0x050: /* movmskps */ |
|
gen_op_movmskps(offsetof(CPUX86State,xmm_regs[reg])); |
|
2728 |
rm = (modrm & 7) | REX_B(s); |
rm = (modrm & 7) | REX_B(s); |
2729 |
gen_op_mov_reg_T0[OT_LONG][rm](); |
gen_op_movmskps(offsetof(CPUX86State,xmm_regs[rm])); |
2730 |
|
gen_op_mov_reg_T0[OT_LONG][reg](); |
2731 |
break; |
break; |
2732 |
case 0x150: /* movmskpd */ |
case 0x150: /* movmskpd */ |
|
gen_op_movmskpd(offsetof(CPUX86State,xmm_regs[reg])); |
|
2733 |
rm = (modrm & 7) | REX_B(s); |
rm = (modrm & 7) | REX_B(s); |
2734 |
gen_op_mov_reg_T0[OT_LONG][rm](); |
gen_op_movmskpd(offsetof(CPUX86State,xmm_regs[rm])); |
2735 |
|
gen_op_mov_reg_T0[OT_LONG][reg](); |
2736 |
break; |
break; |
2737 |
case 0x02a: /* cvtpi2ps */ |
case 0x02a: /* cvtpi2ps */ |
2738 |
case 0x12a: /* cvtpi2pd */ |
case 0x12a: /* cvtpi2pd */ |
2797 |
case 0x22d: /* cvtss2si */ |
case 0x22d: /* cvtss2si */ |
2798 |
case 0x32d: /* cvtsd2si */ |
case 0x32d: /* cvtsd2si */ |
2799 |
ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; |
ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; |
2800 |
op1_offset = offsetof(CPUX86State,xmm_regs[reg]); |
if (mod != 3) { |
2801 |
|
gen_lea_modrm(s, modrm, ®_addr, &offset_addr); |
2802 |
|
if ((b >> 8) & 1) { |
2803 |
|
gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_t0.XMM_Q(0))); |
2804 |
|
} else { |
2805 |
|
gen_op_ld_T0_A0[OT_LONG + s->mem_index](); |
2806 |
|
gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0))); |
2807 |
|
} |
2808 |
|
op2_offset = offsetof(CPUX86State,xmm_t0); |
2809 |
|
} else { |
2810 |
|
rm = (modrm & 7) | REX_B(s); |
2811 |
|
op2_offset = offsetof(CPUX86State,xmm_regs[rm]); |
2812 |
|
} |
2813 |
sse_op_table3[(s->dflag == 2) * 2 + ((b >> 8) - 2) + 4 + |
sse_op_table3[(s->dflag == 2) * 2 + ((b >> 8) - 2) + 4 + |
2814 |
(b & 1) * 4](op1_offset); |
(b & 1) * 4](op2_offset); |
2815 |
gen_ldst_modrm(s, modrm, ot, OR_TMP0, 1); |
gen_op_mov_reg_T0[ot][reg](); |
2816 |
break; |
break; |
2817 |
case 0xc4: /* pinsrw */ |
case 0xc4: /* pinsrw */ |
2818 |
case 0x1c4: |
case 0x1c4: |