61 |
d->W(7) >>= shift; |
d->W(7) >>= shift; |
62 |
#endif |
#endif |
63 |
} |
} |
64 |
|
FORCE_RET(); |
65 |
} |
} |
66 |
|
|
67 |
void OPPROTO glue(op_psraw, SUFFIX)(void) |
void OPPROTO glue(op_psraw, SUFFIX)(void) |
115 |
d->W(7) <<= shift; |
d->W(7) <<= shift; |
116 |
#endif |
#endif |
117 |
} |
} |
118 |
|
FORCE_RET(); |
119 |
} |
} |
120 |
|
|
121 |
void OPPROTO glue(op_psrld, SUFFIX)(void) |
void OPPROTO glue(op_psrld, SUFFIX)(void) |
140 |
d->L(3) >>= shift; |
d->L(3) >>= shift; |
141 |
#endif |
#endif |
142 |
} |
} |
143 |
|
FORCE_RET(); |
144 |
} |
} |
145 |
|
|
146 |
void OPPROTO glue(op_psrad, SUFFIX)(void) |
void OPPROTO glue(op_psrad, SUFFIX)(void) |
186 |
d->L(3) <<= shift; |
d->L(3) <<= shift; |
187 |
#endif |
#endif |
188 |
} |
} |
189 |
|
FORCE_RET(); |
190 |
} |
} |
191 |
|
|
192 |
void OPPROTO glue(op_psrlq, SUFFIX)(void) |
void OPPROTO glue(op_psrlq, SUFFIX)(void) |
209 |
d->Q(1) >>= shift; |
d->Q(1) >>= shift; |
210 |
#endif |
#endif |
211 |
} |
} |
212 |
|
FORCE_RET(); |
213 |
} |
} |
214 |
|
|
215 |
void OPPROTO glue(op_psllq, SUFFIX)(void) |
void OPPROTO glue(op_psllq, SUFFIX)(void) |
232 |
d->Q(1) <<= shift; |
d->Q(1) <<= shift; |
233 |
#endif |
#endif |
234 |
} |
} |
235 |
|
FORCE_RET(); |
236 |
} |
} |
237 |
|
|
238 |
#if SHIFT == 1 |
#if SHIFT == 1 |
484 |
d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) + |
d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) + |
485 |
(int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1); |
(int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1); |
486 |
} |
} |
487 |
|
FORCE_RET(); |
488 |
} |
} |
489 |
|
|
490 |
#if SHIFT == 0 |
#if SHIFT == 0 |
537 |
if (s->B(i) & 0x80) |
if (s->B(i) & 0x80) |
538 |
stb(A0 + i, d->B(i)); |
stb(A0 + i, d->B(i)); |
539 |
} |
} |
540 |
|
FORCE_RET(); |
541 |
} |
} |
542 |
|
|
543 |
void OPPROTO glue(op_movl_mm_T0, SUFFIX) (void) |
void OPPROTO glue(op_movl_mm_T0, SUFFIX) (void) |
690 |
#define FPU_DIV(a, b) (a) / (b) |
#define FPU_DIV(a, b) (a) / (b) |
691 |
#define FPU_MIN(a, b) (a) < (b) ? (a) : (b) |
#define FPU_MIN(a, b) (a) < (b) ? (a) : (b) |
692 |
#define FPU_MAX(a, b) (a) > (b) ? (a) : (b) |
#define FPU_MAX(a, b) (a) > (b) ? (a) : (b) |
693 |
#define FPU_SQRT(a, b) sqrt(b) |
#define FPU_SQRT(a, b) helper_sqrt(b) |
694 |
|
|
695 |
SSE_OP_S(add, FPU_ADD) |
SSE_OP_S(add, FPU_ADD) |
696 |
SSE_OP_S(sub, FPU_SUB) |
SSE_OP_S(sub, FPU_SUB) |
710 |
s = (Reg *)((char *)env + PARAM2); |
s = (Reg *)((char *)env + PARAM2); |
711 |
s0 = s->XMM_S(0); |
s0 = s->XMM_S(0); |
712 |
s1 = s->XMM_S(1); |
s1 = s->XMM_S(1); |
713 |
d->XMM_D(0) = s0; |
d->XMM_D(0) = float32_to_float64(s0); |
714 |
d->XMM_D(1) = s1; |
d->XMM_D(1) = float32_to_float64(s1); |
715 |
} |
} |
716 |
|
|
717 |
void OPPROTO op_cvtpd2ps(void) |
void OPPROTO op_cvtpd2ps(void) |
719 |
Reg *d, *s; |
Reg *d, *s; |
720 |
d = (Reg *)((char *)env + PARAM1); |
d = (Reg *)((char *)env + PARAM1); |
721 |
s = (Reg *)((char *)env + PARAM2); |
s = (Reg *)((char *)env + PARAM2); |
722 |
d->XMM_S(0) = s->XMM_D(0); |
d->XMM_S(0) = float64_to_float32(s->XMM_D(0)); |
723 |
d->XMM_S(1) = s->XMM_D(1); |
d->XMM_S(1) = float64_to_float32(s->XMM_D(1)); |
724 |
d->Q(1) = 0; |
d->Q(1) = 0; |
725 |
} |
} |
726 |
|
|
729 |
Reg *d, *s; |
Reg *d, *s; |
730 |
d = (Reg *)((char *)env + PARAM1); |
d = (Reg *)((char *)env + PARAM1); |
731 |
s = (Reg *)((char *)env + PARAM2); |
s = (Reg *)((char *)env + PARAM2); |
732 |
d->XMM_D(0) = s->XMM_S(0); |
d->XMM_D(0) = float32_to_float64(s->XMM_S(0)); |
733 |
} |
} |
734 |
|
|
735 |
void OPPROTO op_cvtsd2ss(void) |
void OPPROTO op_cvtsd2ss(void) |
737 |
Reg *d, *s; |
Reg *d, *s; |
738 |
d = (Reg *)((char *)env + PARAM1); |
d = (Reg *)((char *)env + PARAM1); |
739 |
s = (Reg *)((char *)env + PARAM2); |
s = (Reg *)((char *)env + PARAM2); |
740 |
d->XMM_S(0) = s->XMM_D(0); |
d->XMM_S(0) = float64_to_float32(s->XMM_D(0)); |
741 |
} |
} |
742 |
|
|
743 |
/* integer to float */ |
/* integer to float */ |
745 |
{ |
{ |
746 |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
747 |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
748 |
d->XMM_S(0) = (int32_t)s->XMM_L(0); |
d->XMM_S(0) = int32_to_float32(s->XMM_L(0)); |
749 |
d->XMM_S(1) = (int32_t)s->XMM_L(1); |
d->XMM_S(1) = int32_to_float32(s->XMM_L(1)); |
750 |
d->XMM_S(2) = (int32_t)s->XMM_L(2); |
d->XMM_S(2) = int32_to_float32(s->XMM_L(2)); |
751 |
d->XMM_S(3) = (int32_t)s->XMM_L(3); |
d->XMM_S(3) = int32_to_float32(s->XMM_L(3)); |
752 |
} |
} |
753 |
|
|
754 |
void OPPROTO op_cvtdq2pd(void) |
void OPPROTO op_cvtdq2pd(void) |
758 |
int32_t l0, l1; |
int32_t l0, l1; |
759 |
l0 = (int32_t)s->XMM_L(0); |
l0 = (int32_t)s->XMM_L(0); |
760 |
l1 = (int32_t)s->XMM_L(1); |
l1 = (int32_t)s->XMM_L(1); |
761 |
d->XMM_D(0) = l0; |
d->XMM_D(0) = int32_to_float64(l0); |
762 |
d->XMM_D(1) = l1; |
d->XMM_D(1) = int32_to_float64(l1); |
763 |
} |
} |
764 |
|
|
765 |
void OPPROTO op_cvtpi2ps(void) |
void OPPROTO op_cvtpi2ps(void) |
766 |
{ |
{ |
767 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
768 |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
769 |
d->XMM_S(0) = (int32_t)s->MMX_L(0); |
d->XMM_S(0) = int32_to_float32(s->MMX_L(0)); |
770 |
d->XMM_S(1) = (int32_t)s->MMX_L(1); |
d->XMM_S(1) = int32_to_float32(s->MMX_L(1)); |
771 |
} |
} |
772 |
|
|
773 |
void OPPROTO op_cvtpi2pd(void) |
void OPPROTO op_cvtpi2pd(void) |
774 |
{ |
{ |
775 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
776 |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
777 |
d->XMM_D(0) = (int32_t)s->MMX_L(0); |
d->XMM_D(0) = int32_to_float64(s->MMX_L(0)); |
778 |
d->XMM_D(1) = (int32_t)s->MMX_L(1); |
d->XMM_D(1) = int32_to_float64(s->MMX_L(1)); |
779 |
} |
} |
780 |
|
|
781 |
void OPPROTO op_cvtsi2ss(void) |
void OPPROTO op_cvtsi2ss(void) |
782 |
{ |
{ |
783 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
784 |
d->XMM_S(0) = (int32_t)T0; |
d->XMM_S(0) = int32_to_float32(T0); |
785 |
} |
} |
786 |
|
|
787 |
void OPPROTO op_cvtsi2sd(void) |
void OPPROTO op_cvtsi2sd(void) |
788 |
{ |
{ |
789 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
790 |
d->XMM_D(0) = (int32_t)T0; |
d->XMM_D(0) = int32_to_float64(T0); |
791 |
} |
} |
792 |
|
|
793 |
#ifdef TARGET_X86_64 |
#ifdef TARGET_X86_64 |
794 |
void OPPROTO op_cvtsq2ss(void) |
void OPPROTO op_cvtsq2ss(void) |
795 |
{ |
{ |
796 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
797 |
d->XMM_S(0) = (int64_t)T0; |
d->XMM_S(0) = int64_to_float32(T0); |
798 |
} |
} |
799 |
|
|
800 |
void OPPROTO op_cvtsq2sd(void) |
void OPPROTO op_cvtsq2sd(void) |
801 |
{ |
{ |
802 |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
XMMReg *d = (Reg *)((char *)env + PARAM1); |
803 |
d->XMM_D(0) = (int64_t)T0; |
d->XMM_D(0) = int64_to_float64(T0); |
804 |
} |
} |
805 |
#endif |
#endif |
806 |
|
|