/[qemu]/qemu/target-i386/helper2.c
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Diff of /qemu/target-i386/helper2.c

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revision 1.31 by bellard, Fri Jan 28 22:37:22 2005 UTC revision 1.32 by bellard, Thu Feb 10 22:06:29 2005 UTC
# Line 98  CPUX86State *cpu_x86_init(void) Line 98  CPUX86State *cpu_x86_init(void)
98  #else  #else
99          /* pentium pro */          /* pentium pro */
100          family = 6;          family = 6;
101          model = 1;          model = 3;
102          stepping = 3;          stepping = 3;
103  #endif  #endif
104  #endif  #endif
# Line 106  CPUX86State *cpu_x86_init(void) Line 106  CPUX86State *cpu_x86_init(void)
106          env->cpuid_features = (CPUID_FP87 | CPUID_DE | CPUID_PSE |          env->cpuid_features = (CPUID_FP87 | CPUID_DE | CPUID_PSE |
107                                 CPUID_TSC | CPUID_MSR | CPUID_MCE |                                 CPUID_TSC | CPUID_MSR | CPUID_MCE |
108                                 CPUID_CX8 | CPUID_PGE | CPUID_CMOV);                                 CPUID_CX8 | CPUID_PGE | CPUID_CMOV);
109            env->cpuid_ext_features = 0;
110            env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP;
111  #ifdef TARGET_X86_64  #ifdef TARGET_X86_64
112          /* currently not enabled for std i386 because not fully tested */          /* currently not enabled for std i386 because not fully tested */
113          env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2;          env->cpuid_features |= CPUID_APIC;
         env->cpuid_features |= CPUID_APIC | CPUID_PAE;  
114  #endif  #endif
115      }      }
116      cpu_single_env = env;      cpu_single_env = env;
117      cpu_reset(env);      cpu_reset(env);
118    #ifdef USE_KQEMU
119        kqemu_init(env);
120    #endif
121      return env;      return env;
122  }  }
123    
# Line 453  void cpu_x86_update_cr0(CPUX86State *env Line 457  void cpu_x86_update_cr0(CPUX86State *env
457          ((new_cr0 << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));          ((new_cr0 << (HF_MP_SHIFT - 1)) & (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK));
458  }  }
459    
460    /* XXX: in legacy PAE mode, generate a GPF if reserved bits are set in
461       the PDPT */
462  void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3)  void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3)
463  {  {
464      env->cr[3] = new_cr3;      env->cr[3] = new_cr3;

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