/[qemu]/qemu/target-i386/exec.h
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revision 1.21 by bellard, Sun Jan 23 20:44:55 2005 UTC revision 1.22 by bellard, Tue Mar 1 22:33:39 2005 UTC
# Line 21  Line 21 
21  #include "dyngen-exec.h"  #include "dyngen-exec.h"
22    
23  /* XXX: factorize this mess */  /* XXX: factorize this mess */
 #if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)  
 #define HOST_LONG_BITS 64  
 #else  
 #define HOST_LONG_BITS 32  
 #endif  
   
24  #ifdef TARGET_X86_64  #ifdef TARGET_X86_64
25  #define TARGET_LONG_BITS 64  #define TARGET_LONG_BITS 64
26  #else  #else
27  #define TARGET_LONG_BITS 32  #define TARGET_LONG_BITS 32
28  #endif  #endif
29    
30    #include "cpu-defs.h"
31    
32  /* at least 4 register variables are defined */  /* at least 4 register variables are defined */
33  register struct CPUX86State *env asm(AREG0);  register struct CPUX86State *env asm(AREG0);
34    
35  /* XXX: use 64 bit regs if HOST_LONG_BITS == 64 */  #if TARGET_LONG_BITS > HOST_LONG_BITS
36  #if TARGET_LONG_BITS == 32  
37    /* no registers can be used */
38    #define T0 (env->t0)
39    #define T1 (env->t1)
40    #define T2 (env->t2)
41    
42  register uint32_t T0 asm(AREG1);  #else
43  register uint32_t T1 asm(AREG2);  
44  register uint32_t T2 asm(AREG3);  /* XXX: use unsigned long instead of target_ulong - better code will
45       be generated for 64 bit CPUs */
46    register target_ulong T0 asm(AREG1);
47    register target_ulong T1 asm(AREG2);
48    register target_ulong T2 asm(AREG3);
49    
50  /* if more registers are available, we define some registers too */  /* if more registers are available, we define some registers too */
51  #ifdef AREG4  #ifdef AREG4
52  register uint32_t EAX asm(AREG4);  register target_ulong EAX asm(AREG4);
53  #define reg_EAX  #define reg_EAX
54  #endif  #endif
55    
56  #ifdef AREG5  #ifdef AREG5
57  register uint32_t ESP asm(AREG5);  register target_ulong ESP asm(AREG5);
58  #define reg_ESP  #define reg_ESP
59  #endif  #endif
60    
61  #ifdef AREG6  #ifdef AREG6
62  register uint32_t EBP asm(AREG6);  register target_ulong EBP asm(AREG6);
63  #define reg_EBP  #define reg_EBP
64  #endif  #endif
65    
66  #ifdef AREG7  #ifdef AREG7
67  register uint32_t ECX asm(AREG7);  register target_ulong ECX asm(AREG7);
68  #define reg_ECX  #define reg_ECX
69  #endif  #endif
70    
71  #ifdef AREG8  #ifdef AREG8
72  register uint32_t EDX asm(AREG8);  register target_ulong EDX asm(AREG8);
73  #define reg_EDX  #define reg_EDX
74  #endif  #endif
75    
76  #ifdef AREG9  #ifdef AREG9
77  register uint32_t EBX asm(AREG9);  register target_ulong EBX asm(AREG9);
78  #define reg_EBX  #define reg_EBX
79  #endif  #endif
80    
81  #ifdef AREG10  #ifdef AREG10
82  register uint32_t ESI asm(AREG10);  register target_ulong ESI asm(AREG10);
83  #define reg_ESI  #define reg_ESI
84  #endif  #endif
85    
86  #ifdef AREG11  #ifdef AREG11
87  register uint32_t EDI asm(AREG11);  register target_ulong EDI asm(AREG11);
88  #define reg_EDI  #define reg_EDI
89  #endif  #endif
90    
91  #else  #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
   
 /* no registers can be used */  
 #define T0 (env->t0)  
 #define T1 (env->t1)  
 #define T2 (env->t2)  
   
 #endif  
92    
93  #define A0 T2  #define A0 T2
94    

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