497 |
int error_code; |
int error_code; |
498 |
int exception_is_int; |
int exception_is_int; |
499 |
target_ulong exception_next_eip; |
target_ulong exception_next_eip; |
|
struct TranslationBlock *current_tb; /* currently executing TB */ |
|
500 |
target_ulong dr[8]; /* debug registers */ |
target_ulong dr[8]; /* debug registers */ |
501 |
int interrupt_request; |
int interrupt_request; |
502 |
int user_mode_only; /* user mode only simulation */ |
int user_mode_only; /* user mode only simulation */ |
503 |
|
|
504 |
/* soft mmu support */ |
CPU_COMMON |
|
/* in order to avoid passing too many arguments to the memory |
|
|
write helpers, we store some rarely used information in the CPU |
|
|
context) */ |
|
|
unsigned long mem_write_pc; /* host pc at which the memory was |
|
|
written */ |
|
|
target_ulong mem_write_vaddr; /* target virtual addr at which the |
|
|
memory was written */ |
|
|
/* 0 = kernel, 1 = user */ |
|
|
CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; |
|
|
CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; |
|
|
|
|
|
/* from this point: preserved by CPU reset */ |
|
|
/* ice debug support */ |
|
|
target_ulong breakpoints[MAX_BREAKPOINTS]; |
|
|
int nb_breakpoints; |
|
|
int singlestep_enabled; |
|
505 |
|
|
506 |
/* processor features (e.g. for CPUID insn) */ |
/* processor features (e.g. for CPUID insn) */ |
507 |
uint32_t cpuid_level; |
uint32_t cpuid_level; |
521 |
/* in order to simplify APIC support, we leave this pointer to the |
/* in order to simplify APIC support, we leave this pointer to the |
522 |
user */ |
user */ |
523 |
struct APICState *apic_state; |
struct APICState *apic_state; |
|
/* user data */ |
|
|
void *opaque; |
|
524 |
} CPUX86State; |
} CPUX86State; |
525 |
|
|
526 |
CPUX86State *cpu_x86_init(void); |
CPUX86State *cpu_x86_init(void); |