/[qemu]/qemu/target-i386/cpu.h
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Diff of /qemu/target-i386/cpu.h

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revision 1.29 by bellard, Sun Apr 17 19:16:13 2005 UTC revision 1.30 by bellard, Sat Apr 23 17:46:55 2005 UTC
# Line 258  Line 258 
258    
259  #define CPUID_EXT2_SYSCALL (1 << 11)  #define CPUID_EXT2_SYSCALL (1 << 11)
260  #define CPUID_EXT2_NX      (1 << 20)  #define CPUID_EXT2_NX      (1 << 20)
261    #define CPUID_EXT2_FFXSR   (1 << 25)
262  #define CPUID_EXT2_LM      (1 << 29)  #define CPUID_EXT2_LM      (1 << 29)
263    
264  #define EXCP00_DIVZ     0  #define EXCP00_DIVZ     0
# Line 464  typedef struct CPUX86State { Line 465  typedef struct CPUX86State {
465      uint32_t sysenter_cs;      uint32_t sysenter_cs;
466      uint32_t sysenter_esp;      uint32_t sysenter_esp;
467      uint32_t sysenter_eip;      uint32_t sysenter_eip;
468        uint64_t efer;
469        uint64_t star;
470  #ifdef TARGET_X86_64  #ifdef TARGET_X86_64
     target_ulong efer;  
     target_ulong star;  
471      target_ulong lstar;      target_ulong lstar;
472      target_ulong cstar;      target_ulong cstar;
473      target_ulong fmask;      target_ulong fmask;
# Line 510  typedef struct CPUX86State { Line 511  typedef struct CPUX86State {
511      int singlestep_enabled;      int singlestep_enabled;
512    
513      /* processor features (e.g. for CPUID insn) */      /* processor features (e.g. for CPUID insn) */
514        uint32_t cpuid_level;
515      uint32_t cpuid_vendor1;      uint32_t cpuid_vendor1;
516      uint32_t cpuid_vendor2;      uint32_t cpuid_vendor2;
517      uint32_t cpuid_vendor3;      uint32_t cpuid_vendor3;
518      uint32_t cpuid_version;      uint32_t cpuid_version;
519      uint32_t cpuid_features;      uint32_t cpuid_features;
520      uint32_t cpuid_ext_features;      uint32_t cpuid_ext_features;
521        uint32_t cpuid_xlevel;
522        uint32_t cpuid_model[12];
523        uint32_t cpuid_ext2_features;
524        
525  #ifdef USE_KQEMU  #ifdef USE_KQEMU
526      int kqemu_enabled;      int kqemu_enabled;
527  #endif  #endif

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