/[qemu]/qemu/target-i386/cpu.h
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Diff of /qemu/target-i386/cpu.h

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revision 1.24 by bellard, Sun Jan 23 20:43:45 2005 UTC revision 1.25 by bellard, Thu Feb 10 22:05:51 2005 UTC
# Line 39  Line 39 
39  #if defined(__i386__) && !defined(CONFIG_SOFTMMU)  #if defined(__i386__) && !defined(CONFIG_SOFTMMU)
40  #define USE_CODE_COPY  #define USE_CODE_COPY
41  #endif  #endif
42    #if defined(__linux__) && defined(CONFIG_SOFTMMU) && defined(__i386__) && !defined(TARGET_X86_64)
43    #define USE_KQEMU
44    #endif
45    
46  #define R_EAX 0  #define R_EAX 0
47  #define R_ECX 1  #define R_ECX 1
# Line 248  Line 251 
251  #define CPUID_SSE  (1 << 25)  #define CPUID_SSE  (1 << 25)
252  #define CPUID_SSE2 (1 << 26)  #define CPUID_SSE2 (1 << 26)
253    
254    #define CPUID_EXT_SS3      (1 << 0)
255    #define CPUID_EXT_MONITOR  (1 << 3)
256    #define CPUID_EXT_CX16     (1 << 13)
257    
258    #define CPUID_EXT2_SYSCALL (1 << 11)
259    #define CPUID_EXT2_NX      (1 << 20)
260    #define CPUID_EXT2_LM      (1 << 29)
261    
262  #define EXCP00_DIVZ     0  #define EXCP00_DIVZ     0
263  #define EXCP01_SSTP     1  #define EXCP01_SSTP     1
264  #define EXCP02_NMI      2  #define EXCP02_NMI      2
# Line 408  typedef struct CPUX86State { Line 419  typedef struct CPUX86State {
419      int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */      int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
420      uint32_t hflags; /* hidden flags, see HF_xxx constants */      uint32_t hflags; /* hidden flags, see HF_xxx constants */
421    
422        /* segments */
423        SegmentCache segs[6]; /* selector values */
424        SegmentCache ldt;
425        SegmentCache tr;
426        SegmentCache gdt; /* only base and limit are used */
427        SegmentCache idt; /* only base and limit are used */
428    
429        target_ulong cr[5]; /* NOTE: cr1 is unused */
430        uint32_t a20_mask;
431    
432      /* FPU state */      /* FPU state */
433      unsigned int fpstt; /* top of stack index */      unsigned int fpstt; /* top of stack index */
434      unsigned int fpus;      unsigned int fpus;
# Line 431  typedef struct CPUX86State { Line 452  typedef struct CPUX86State {
452          int64_t i64;          int64_t i64;
453      } fp_convert;      } fp_convert;
454            
     /* segments */  
     SegmentCache segs[6]; /* selector values */  
     SegmentCache ldt;  
     SegmentCache tr;  
     SegmentCache gdt; /* only base and limit are used */  
     SegmentCache idt; /* only base and limit are used */  
   
455      uint32_t mxcsr;      uint32_t mxcsr;
456      XMMReg xmm_regs[CPU_NB_REGS];      XMMReg xmm_regs[CPU_NB_REGS];
457      XMMReg xmm_t0;      XMMReg xmm_t0;
# Line 470  typedef struct CPUX86State { Line 484  typedef struct CPUX86State {
484      int exception_is_int;      int exception_is_int;
485      target_ulong exception_next_eip;      target_ulong exception_next_eip;
486      struct TranslationBlock *current_tb; /* currently executing TB */      struct TranslationBlock *current_tb; /* currently executing TB */
     target_ulong cr[5]; /* NOTE: cr1 is unused */  
487      target_ulong dr[8]; /* debug registers */      target_ulong dr[8]; /* debug registers */
488      int interrupt_request;      int interrupt_request;
489      int user_mode_only; /* user mode only simulation */      int user_mode_only; /* user mode only simulation */
490    
     uint32_t a20_mask;  
   
491      /* soft mmu support */      /* soft mmu support */
492      /* in order to avoid passing too many arguments to the memory      /* in order to avoid passing too many arguments to the memory
493         write helpers, we store some rarely used information in the CPU         write helpers, we store some rarely used information in the CPU
# Line 501  typedef struct CPUX86State { Line 512  typedef struct CPUX86State {
512      uint32_t cpuid_vendor3;      uint32_t cpuid_vendor3;
513      uint32_t cpuid_version;      uint32_t cpuid_version;
514      uint32_t cpuid_features;      uint32_t cpuid_features;
515        uint32_t cpuid_ext_features;
516    
517    #ifdef USE_KQEMU
518        int kqemu_enabled;
519    #endif
520      /* in order to simplify APIC support, we leave this pointer to the      /* in order to simplify APIC support, we leave this pointer to the
521         user */         user */
522      struct APICState *apic_state;      struct APICState *apic_state;

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