1019 |
case 0x5: /* saturating add/subtract */ |
case 0x5: /* saturating add/subtract */ |
1020 |
rd = (insn >> 12) & 0xf; |
rd = (insn >> 12) & 0xf; |
1021 |
rn = (insn >> 16) & 0xf; |
rn = (insn >> 16) & 0xf; |
1022 |
gen_movl_T0_reg(s, rn); |
gen_movl_T0_reg(s, rm); |
1023 |
if (op1 & 2) { |
gen_movl_T1_reg(s, rn); |
1024 |
gen_movl_T1_reg(s, rn); |
if (op1 & 2) |
1025 |
if (op1 & 1) |
gen_op_double_T1_saturate(); |
|
gen_op_subl_T0_T1_saturate(); |
|
|
else |
|
|
gen_op_addl_T0_T1_saturate(); |
|
|
} |
|
|
gen_movl_T1_reg(s, rm); |
|
1026 |
if (op1 & 1) |
if (op1 & 1) |
1027 |
gen_op_subl_T0_T1_saturate(); |
gen_op_subl_T0_T1_saturate(); |
1028 |
else |
else |
1029 |
gen_op_addl_T0_T1_saturate(); |
gen_op_addl_T0_T1_saturate(); |
1030 |
gen_movl_reg_T0(s, rn); |
gen_movl_reg_T0(s, rd); |
1031 |
break; |
break; |
1032 |
case 0x8: /* signed multiply */ |
case 0x8: /* signed multiply */ |
1033 |
case 0xa: |
case 0xa: |