/[qemu]/qemu/target-arm/cpu.h
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revision 1.9 by bellard, Thu Apr 7 19:42:46 2005 UTC revision 1.10 by bellard, Sun Apr 17 19:16:13 2005 UTC
# Line 26  Line 26 
26    
27  #include "softfloat.h"  #include "softfloat.h"
28    
29    #define TARGET_HAS_ICE 1
30    
31  #define EXCP_UDEF            1   /* undefined instruction */  #define EXCP_UDEF            1   /* undefined instruction */
32  #define EXCP_SWI             2   /* software interrupt */  #define EXCP_SWI             2   /* software interrupt */
33  #define EXCP_PREFETCH_ABORT  3  #define EXCP_PREFETCH_ABORT  3
# Line 62  typedef struct CPUARMState { Line 64  typedef struct CPUARMState {
64      int user_mode_only;      int user_mode_only;
65      uint32_t address;      uint32_t address;
66    
67        /* ICE debug support.  */
68        target_ulong breakpoints[MAX_BREAKPOINTS];
69        int nb_breakpoints;
70        int singlestep_enabled;
71    
72      /* in order to avoid passing too many arguments to the memory      /* in order to avoid passing too many arguments to the memory
73         write helpers, we store some rarely used information in the CPU         write helpers, we store some rarely used information in the CPU
74         context) */         context) */

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