55 |
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
56 |
#elif defined (TARGET_PPC) |
#elif defined (TARGET_PPC) |
57 |
#define CPU_MEM_INDEX (msr_pr) |
#define CPU_MEM_INDEX (msr_pr) |
58 |
|
#elif defined (TARGET_MIPS) |
59 |
|
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
60 |
#elif defined (TARGET_SPARC) |
#elif defined (TARGET_SPARC) |
61 |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
62 |
#endif |
#endif |
68 |
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
69 |
#elif defined (TARGET_PPC) |
#elif defined (TARGET_PPC) |
70 |
#define CPU_MEM_INDEX (msr_pr) |
#define CPU_MEM_INDEX (msr_pr) |
71 |
|
#elif defined (TARGET_MIPS) |
72 |
|
#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) |
73 |
#elif defined (TARGET_SPARC) |
#elif defined (TARGET_SPARC) |
74 |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
#define CPU_MEM_INDEX ((env->psrs) == 0) |
75 |
#endif |
#endif |