357 |
T0 = T0 & 0xffff; |
T0 = T0 & 0xffff; |
358 |
} |
} |
359 |
|
|
360 |
|
void OPPROTO op_andl_T0_im(void) |
361 |
|
{ |
362 |
|
T0 = T0 & PARAM1; |
363 |
|
} |
364 |
|
|
365 |
void OPPROTO op_movl_T0_T1(void) |
void OPPROTO op_movl_T0_T1(void) |
366 |
{ |
{ |
367 |
T0 = T1; |
T0 = T1; |
670 |
{ |
{ |
671 |
uint32_t offset; |
uint32_t offset; |
672 |
offset = ESP - 4; |
offset = ESP - 4; |
673 |
stl(env->seg_cache[R_SS].base + offset, T0); |
stl(env->segs[R_SS].base + offset, T0); |
674 |
/* modify ESP after to handle exceptions correctly */ |
/* modify ESP after to handle exceptions correctly */ |
675 |
ESP = offset; |
ESP = offset; |
676 |
} |
} |
679 |
{ |
{ |
680 |
uint32_t offset; |
uint32_t offset; |
681 |
offset = ESP - 2; |
offset = ESP - 2; |
682 |
stw(env->seg_cache[R_SS].base + offset, T0); |
stw(env->segs[R_SS].base + offset, T0); |
683 |
/* modify ESP after to handle exceptions correctly */ |
/* modify ESP after to handle exceptions correctly */ |
684 |
ESP = offset; |
ESP = offset; |
685 |
} |
} |
688 |
{ |
{ |
689 |
uint32_t offset; |
uint32_t offset; |
690 |
offset = (ESP - 4) & 0xffff; |
offset = (ESP - 4) & 0xffff; |
691 |
stl(env->seg_cache[R_SS].base + offset, T0); |
stl(env->segs[R_SS].base + offset, T0); |
692 |
/* modify ESP after to handle exceptions correctly */ |
/* modify ESP after to handle exceptions correctly */ |
693 |
ESP = (ESP & ~0xffff) | offset; |
ESP = (ESP & ~0xffff) | offset; |
694 |
} |
} |
697 |
{ |
{ |
698 |
uint32_t offset; |
uint32_t offset; |
699 |
offset = (ESP - 2) & 0xffff; |
offset = (ESP - 2) & 0xffff; |
700 |
stw(env->seg_cache[R_SS].base + offset, T0); |
stw(env->segs[R_SS].base + offset, T0); |
701 |
/* modify ESP after to handle exceptions correctly */ |
/* modify ESP after to handle exceptions correctly */ |
702 |
ESP = (ESP & ~0xffff) | offset; |
ESP = (ESP & ~0xffff) | offset; |
703 |
} |
} |
715 |
|
|
716 |
void op_popl_ss32_T0(void) |
void op_popl_ss32_T0(void) |
717 |
{ |
{ |
718 |
T0 = ldl(env->seg_cache[R_SS].base + ESP); |
T0 = ldl(env->segs[R_SS].base + ESP); |
719 |
} |
} |
720 |
|
|
721 |
void op_popw_ss32_T0(void) |
void op_popw_ss32_T0(void) |
722 |
{ |
{ |
723 |
T0 = lduw(env->seg_cache[R_SS].base + ESP); |
T0 = lduw(env->segs[R_SS].base + ESP); |
724 |
} |
} |
725 |
|
|
726 |
void op_popl_ss16_T0(void) |
void op_popl_ss16_T0(void) |
727 |
{ |
{ |
728 |
T0 = ldl(env->seg_cache[R_SS].base + (ESP & 0xffff)); |
T0 = ldl(env->segs[R_SS].base + (ESP & 0xffff)); |
729 |
} |
} |
730 |
|
|
731 |
void op_popw_ss16_T0(void) |
void op_popw_ss16_T0(void) |
732 |
{ |
{ |
733 |
T0 = lduw(env->seg_cache[R_SS].base + (ESP & 0xffff)); |
T0 = lduw(env->segs[R_SS].base + (ESP & 0xffff)); |
734 |
} |
} |
735 |
|
|
736 |
void op_addl_ESP_4(void) |
void op_addl_ESP_4(void) |
914 |
void OPPROTO op_movl_seg_T0_vm(void) |
void OPPROTO op_movl_seg_T0_vm(void) |
915 |
{ |
{ |
916 |
int selector; |
int selector; |
917 |
|
SegmentCache *sc; |
918 |
|
|
919 |
selector = T0 & 0xffff; |
selector = T0 & 0xffff; |
920 |
/* env->segs[] access */ |
/* env->segs[] access */ |
921 |
*(uint32_t *)((char *)env + PARAM1) = selector; |
sc = (SegmentCache *)((char *)env + PARAM1); |
922 |
/* env->seg_cache[] access */ |
sc->selector = selector; |
923 |
((SegmentCache *)((char *)env + PARAM2))->base = (void *)(selector << 4); |
sc->base = (void *)(selector << 4); |
924 |
} |
} |
925 |
|
|
926 |
void OPPROTO op_movl_T0_seg(void) |
void OPPROTO op_movl_T0_seg(void) |
927 |
{ |
{ |
928 |
T0 = env->segs[PARAM1]; |
T0 = env->segs[PARAM1].selector; |
929 |
} |
} |
930 |
|
|
931 |
void OPPROTO op_movl_A0_seg(void) |
void OPPROTO op_movl_A0_seg(void) |
948 |
helper_lar(); |
helper_lar(); |
949 |
} |
} |
950 |
|
|
951 |
|
/* T0: segment, T1:eip */ |
952 |
|
void OPPROTO op_ljmp_T0_T1(void) |
953 |
|
{ |
954 |
|
jmp_seg(T0 & 0xffff, T1); |
955 |
|
} |
956 |
|
|
957 |
|
void OPPROTO op_lldt_T0(void) |
958 |
|
{ |
959 |
|
helper_lldt_T0(); |
960 |
|
} |
961 |
|
|
962 |
|
void OPPROTO op_ltr_T0(void) |
963 |
|
{ |
964 |
|
helper_ltr_T0(); |
965 |
|
} |
966 |
|
|
967 |
|
/* CR registers access */ |
968 |
|
void OPPROTO op_movl_crN_T0(void) |
969 |
|
{ |
970 |
|
helper_movl_crN_T0(PARAM1); |
971 |
|
} |
972 |
|
|
973 |
|
/* DR registers access */ |
974 |
|
void OPPROTO op_movl_drN_T0(void) |
975 |
|
{ |
976 |
|
helper_movl_drN_T0(PARAM1); |
977 |
|
} |
978 |
|
|
979 |
|
void OPPROTO op_lmsw_T0(void) |
980 |
|
{ |
981 |
|
/* only 4 lower bits of CR0 are modified */ |
982 |
|
T0 = (env->cr[0] & ~0xf) | (T0 & 0xf); |
983 |
|
helper_movl_crN_T0(0); |
984 |
|
} |
985 |
|
|
986 |
|
void OPPROTO op_movl_T0_env(void) |
987 |
|
{ |
988 |
|
T0 = *(uint32_t *)((char *)env + PARAM1); |
989 |
|
} |
990 |
|
|
991 |
|
void OPPROTO op_movl_env_T0(void) |
992 |
|
{ |
993 |
|
*(uint32_t *)((char *)env + PARAM1) = T0; |
994 |
|
} |
995 |
|
|
996 |
|
void OPPROTO op_movl_env_T1(void) |
997 |
|
{ |
998 |
|
*(uint32_t *)((char *)env + PARAM1) = T1; |
999 |
|
} |
1000 |
|
|
1001 |
|
void OPPROTO op_clts(void) |
1002 |
|
{ |
1003 |
|
env->cr[0] &= ~CR0_TS_MASK; |
1004 |
|
} |
1005 |
|
|
1006 |
/* flags handling */ |
/* flags handling */ |
1007 |
|
|
1008 |
/* slow jumps cases : in order to avoid calling a function with a |
/* slow jumps cases : in order to avoid calling a function with a |