1060 |
#endif |
#endif |
1061 |
|
|
1062 |
#if defined(TARGET_SPARC) |
#if defined(TARGET_SPARC) |
1063 |
|
#ifndef TARGET_SPARC64 |
1064 |
static target_long monitor_get_psr (struct MonitorDef *md, int val) |
static target_long monitor_get_psr (struct MonitorDef *md, int val) |
1065 |
{ |
{ |
1066 |
return GET_PSR(cpu_single_env); |
return GET_PSR(cpu_single_env); |
1067 |
} |
} |
1068 |
|
#endif |
1069 |
|
|
1070 |
static target_long monitor_get_reg(struct MonitorDef *md, int val) |
static target_long monitor_get_reg(struct MonitorDef *md, int val) |
1071 |
{ |
{ |
1204 |
{ "pc", offsetof(CPUState, pc) }, |
{ "pc", offsetof(CPUState, pc) }, |
1205 |
{ "npc", offsetof(CPUState, npc) }, |
{ "npc", offsetof(CPUState, npc) }, |
1206 |
{ "y", offsetof(CPUState, y) }, |
{ "y", offsetof(CPUState, y) }, |
1207 |
|
#ifndef TARGET_SPARC64 |
1208 |
{ "psr", 0, &monitor_get_psr, }, |
{ "psr", 0, &monitor_get_psr, }, |
1209 |
{ "wim", offsetof(CPUState, wim) }, |
{ "wim", offsetof(CPUState, wim) }, |
1210 |
|
#endif |
1211 |
{ "tbr", offsetof(CPUState, tbr) }, |
{ "tbr", offsetof(CPUState, tbr) }, |
1212 |
{ "fsr", offsetof(CPUState, fsr) }, |
{ "fsr", offsetof(CPUState, fsr) }, |
1213 |
{ "f0", offsetof(CPUState, fpr[0]) }, |
{ "f0", offsetof(CPUState, fpr[0]) }, |
1242 |
{ "f29", offsetof(CPUState, fpr[29]) }, |
{ "f29", offsetof(CPUState, fpr[29]) }, |
1243 |
{ "f30", offsetof(CPUState, fpr[30]) }, |
{ "f30", offsetof(CPUState, fpr[30]) }, |
1244 |
{ "f31", offsetof(CPUState, fpr[31]) }, |
{ "f31", offsetof(CPUState, fpr[31]) }, |
1245 |
|
#ifdef TARGET_SPARC64 |
1246 |
|
{ "f32", offsetof(CPUState, fpr[32]) }, |
1247 |
|
{ "f34", offsetof(CPUState, fpr[34]) }, |
1248 |
|
{ "f36", offsetof(CPUState, fpr[36]) }, |
1249 |
|
{ "f38", offsetof(CPUState, fpr[38]) }, |
1250 |
|
{ "f40", offsetof(CPUState, fpr[40]) }, |
1251 |
|
{ "f42", offsetof(CPUState, fpr[42]) }, |
1252 |
|
{ "f44", offsetof(CPUState, fpr[44]) }, |
1253 |
|
{ "f46", offsetof(CPUState, fpr[46]) }, |
1254 |
|
{ "f48", offsetof(CPUState, fpr[48]) }, |
1255 |
|
{ "f50", offsetof(CPUState, fpr[50]) }, |
1256 |
|
{ "f52", offsetof(CPUState, fpr[52]) }, |
1257 |
|
{ "f54", offsetof(CPUState, fpr[54]) }, |
1258 |
|
{ "f56", offsetof(CPUState, fpr[56]) }, |
1259 |
|
{ "f58", offsetof(CPUState, fpr[58]) }, |
1260 |
|
{ "f60", offsetof(CPUState, fpr[60]) }, |
1261 |
|
{ "f62", offsetof(CPUState, fpr[62]) }, |
1262 |
|
{ "asi", offsetof(CPUState, asi) }, |
1263 |
|
{ "pstate", offsetof(CPUState, pstate) }, |
1264 |
|
{ "cansave", offsetof(CPUState, cansave) }, |
1265 |
|
{ "canrestore", offsetof(CPUState, canrestore) }, |
1266 |
|
{ "otherwin", offsetof(CPUState, otherwin) }, |
1267 |
|
{ "wstate", offsetof(CPUState, wstate) }, |
1268 |
|
{ "cleanwin", offsetof(CPUState, cleanwin) }, |
1269 |
|
{ "fprs", offsetof(CPUState, fprs) }, |
1270 |
|
#endif |
1271 |
#endif |
#endif |
1272 |
{ NULL }, |
{ NULL }, |
1273 |
}; |
}; |