44 |
int irq; |
int irq; |
45 |
uint8_t config; |
uint8_t config; |
46 |
uint8_t aux1, aux2; |
uint8_t aux1, aux2; |
47 |
uint8_t diag, mctrl; |
uint8_t diag, mctrl, sysctrl; |
48 |
} MiscState; |
} MiscState; |
49 |
|
|
50 |
#define MISC_MAXADDR 1 |
#define MISC_MAXADDR 1 |
64 |
{ |
{ |
65 |
MiscState *s = opaque; |
MiscState *s = opaque; |
66 |
|
|
67 |
// Diagnostic register not cleared in reset |
// Diagnostic and system control registers not cleared in reset |
68 |
s->config = s->aux1 = s->aux2 = s->mctrl = 0; |
s->config = s->aux1 = s->aux2 = s->mctrl = 0; |
69 |
} |
} |
70 |
|
|
116 |
break; |
break; |
117 |
case 0x1f00000: |
case 0x1f00000: |
118 |
MISC_DPRINTF("Write system control %2.2x\n", val & 0xff); |
MISC_DPRINTF("Write system control %2.2x\n", val & 0xff); |
119 |
if (val & 1) |
if (val & 1) { |
120 |
|
s->sysctrl = 0x2; |
121 |
qemu_system_reset_request(); |
qemu_system_reset_request(); |
122 |
|
} |
123 |
break; |
break; |
124 |
case 0xa000000: |
case 0xa000000: |
125 |
MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); |
MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); |
160 |
break; |
break; |
161 |
case 0x1f00000: |
case 0x1f00000: |
162 |
MISC_DPRINTF("Read system control %2.2x\n", ret); |
MISC_DPRINTF("Read system control %2.2x\n", ret); |
163 |
|
ret = s->sysctrl; |
164 |
break; |
break; |
165 |
case 0xa000000: |
case 0xa000000: |
166 |
MISC_DPRINTF("Read power management %2.2x\n", ret); |
MISC_DPRINTF("Read power management %2.2x\n", ret); |
191 |
qemu_put_8s(f, &s->aux2); |
qemu_put_8s(f, &s->aux2); |
192 |
qemu_put_8s(f, &s->diag); |
qemu_put_8s(f, &s->diag); |
193 |
qemu_put_8s(f, &s->mctrl); |
qemu_put_8s(f, &s->mctrl); |
194 |
|
qemu_put_8s(f, &s->sysctrl); |
195 |
} |
} |
196 |
|
|
197 |
static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id) |
static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id) |
207 |
qemu_get_8s(f, &s->aux2); |
qemu_get_8s(f, &s->aux2); |
208 |
qemu_get_8s(f, &s->diag); |
qemu_get_8s(f, &s->diag); |
209 |
qemu_get_8s(f, &s->mctrl); |
qemu_get_8s(f, &s->mctrl); |
210 |
|
qemu_get_8s(f, &s->sysctrl); |
211 |
return 0; |
return 0; |
212 |
} |
} |
213 |
|
|