254 |
case KBD_CCMD_READ_OUTPORT: |
case KBD_CCMD_READ_OUTPORT: |
255 |
/* XXX: check that */ |
/* XXX: check that */ |
256 |
#ifdef TARGET_I386 |
#ifdef TARGET_I386 |
257 |
val = 0x01 | (((cpu_single_env->a20_mask >> 20) & 1) << 1); |
val = 0x01 | (ioport_get_a20() << 1); |
258 |
#else |
#else |
259 |
val = 0x01; |
val = 0x01; |
260 |
#endif |
#endif |
266 |
break; |
break; |
267 |
#ifdef TARGET_I386 |
#ifdef TARGET_I386 |
268 |
case KBD_CCMD_ENABLE_A20: |
case KBD_CCMD_ENABLE_A20: |
269 |
cpu_x86_set_a20(cpu_single_env, 1); |
ioport_set_a20(1); |
270 |
break; |
break; |
271 |
case KBD_CCMD_DISABLE_A20: |
case KBD_CCMD_DISABLE_A20: |
272 |
cpu_x86_set_a20(cpu_single_env, 0); |
ioport_set_a20(0); |
273 |
break; |
break; |
274 |
#endif |
#endif |
275 |
case KBD_CCMD_RESET: |
case KBD_CCMD_RESET: |
611 |
break; |
break; |
612 |
case KBD_CCMD_WRITE_OUTPORT: |
case KBD_CCMD_WRITE_OUTPORT: |
613 |
#ifdef TARGET_I386 |
#ifdef TARGET_I386 |
614 |
cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1); |
ioport_set_a20((val >> 1) & 1); |
615 |
#endif |
#endif |
616 |
if (!(val & 1)) { |
if (!(val & 1)) { |
617 |
qemu_system_reset_request(); |
qemu_system_reset_request(); |