65 |
return qemu_get_clock(vm_clock); |
return qemu_get_clock(vm_clock); |
66 |
} |
} |
67 |
|
|
68 |
|
/* IRQ handling */ |
69 |
|
int cpu_get_pic_interrupt(CPUState *env) |
70 |
|
{ |
71 |
|
int intno; |
72 |
|
|
73 |
|
#ifdef TARGET_X86_64 |
74 |
|
intno = apic_get_interrupt(env); |
75 |
|
if (intno >= 0) { |
76 |
|
/* set irq request if a PIC irq is still pending */ |
77 |
|
/* XXX: improve that */ |
78 |
|
pic_update_irq(isa_pic); |
79 |
|
return intno; |
80 |
|
} |
81 |
|
#endif |
82 |
|
/* read the irq from the PIC */ |
83 |
|
intno = pic_read_irq(isa_pic); |
84 |
|
return intno; |
85 |
|
} |
86 |
|
|
87 |
|
static void pic_irq_request(void *opaque, int level) |
88 |
|
{ |
89 |
|
if (level) |
90 |
|
cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); |
91 |
|
else |
92 |
|
cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); |
93 |
|
} |
94 |
|
|
95 |
/* PC cmos mappings */ |
/* PC cmos mappings */ |
96 |
|
|
97 |
#define REG_EQUIPMENT_BYTE 0x14 |
#define REG_EQUIPMENT_BYTE 0x14 |
559 |
|
|
560 |
if (pci_enabled) |
if (pci_enabled) |
561 |
apic_init(cpu_single_env); |
apic_init(cpu_single_env); |
562 |
pic_init(); |
isa_pic = pic_init(pic_irq_request, cpu_single_env); |
563 |
pit = pit_init(0x40, 0); |
pit = pit_init(0x40, 0); |
564 |
|
|
565 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |