/[qemu]/qemu/hw/dma.c
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Diff of /qemu/hw/dma.c

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revision 1.12 by bellard, Sun Nov 7 18:04:02 2004 UTC revision 1.13 by bellard, Sun Nov 14 17:30:35 2004 UTC
# Line 63  static struct dma_cont { Line 63  static struct dma_cont {
63  } dma_controllers[2];  } dma_controllers[2];
64    
65  enum {  enum {
66    CMD_MEMORY_TO_MEMORY = 0x01,      CMD_MEMORY_TO_MEMORY = 0x01,
67    CMD_FIXED_ADDRESS    = 0x02,      CMD_FIXED_ADDRESS    = 0x02,
68    CMD_BLOCK_CONTROLLER = 0x04,      CMD_BLOCK_CONTROLLER = 0x04,
69    CMD_COMPRESSED_TIME  = 0x08,      CMD_COMPRESSED_TIME  = 0x08,
70    CMD_CYCLIC_PRIORITY  = 0x10,      CMD_CYCLIC_PRIORITY  = 0x10,
71    CMD_EXTENDED_WRITE   = 0x20,      CMD_EXTENDED_WRITE   = 0x20,
72    CMD_LOW_DREQ         = 0x40,      CMD_LOW_DREQ         = 0x40,
73    CMD_LOW_DACK         = 0x80,      CMD_LOW_DACK         = 0x80,
74    CMD_NOT_SUPPORTED    = CMD_MEMORY_TO_MEMORY | CMD_FIXED_ADDRESS      CMD_NOT_SUPPORTED    = CMD_MEMORY_TO_MEMORY | CMD_FIXED_ADDRESS
75    | CMD_COMPRESSED_TIME | CMD_CYCLIC_PRIORITY | CMD_EXTENDED_WRITE      | CMD_COMPRESSED_TIME | CMD_CYCLIC_PRIORITY | CMD_EXTENDED_WRITE
76    | CMD_LOW_DREQ | CMD_LOW_DACK      | CMD_LOW_DREQ | CMD_LOW_DACK
77    
78  };  };
79    
# Line 228  static void write_cont (void *opaque, ui Line 228  static void write_cont (void *opaque, ui
228  #ifdef DEBUG_DMA  #ifdef DEBUG_DMA
229              {              {
230                  int op, ai, dir, opmode;                  int op, ai, dir, opmode;
231              op = (data >> 2) & 3;                  op = (data >> 2) & 3;
232              ai = (data >> 4) & 1;                  ai = (data >> 4) & 1;
233              dir = (data >> 5) & 1;                  dir = (data >> 5) & 1;
234              opmode = (data >> 6) & 3;                  opmode = (data >> 6) & 3;
235    
236              linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n",                  linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n",
237                     ichan, op, ai, dir, opmode);                         ichan, op, ai, dir, opmode);
238              }              }
239  #endif  #endif
240              d->regs[ichan].mode = data;              d->regs[ichan].mode = data;

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