/[qemu]/qemu/hw/cirrus_vga.c
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Diff of /qemu/hw/cirrus_vga.c

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revision 1.18 by bellard, Wed Jan 26 19:50:16 2005 UTC revision 1.19 by bellard, Sun Apr 17 17:56:18 2005 UTC
# Line 800  static void cirrus_bitblt_start(CirrusVG Line 800  static void cirrus_bitblt_start(CirrusVG
800             s->cirrus_blt_srcpitch,             s->cirrus_blt_srcpitch,
801             s->cirrus_blt_dstaddr,             s->cirrus_blt_dstaddr,
802             s->cirrus_blt_srcaddr,             s->cirrus_blt_srcaddr,
803             s->sr[0x2f]);             s->gr[0x2f]);
804  #endif  #endif
805    
806      switch (s->cirrus_blt_mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) {      switch (s->cirrus_blt_mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) {
# Line 1042  static void cirrus_update_bank_ptr(Cirru Line 1042  static void cirrus_update_bank_ptr(Cirru
1042      else      else
1043          offset <<= 12;          offset <<= 12;
1044    
1045      if (s->vram_size <= offset)      if (s->real_vram_size <= offset)
1046          limit = 0;          limit = 0;
1047      else      else
1048          limit = s->vram_size - offset;          limit = s->real_vram_size - offset;
1049    
1050      if (((s->gr[0x0b] & 0x01) == 0) && (bank_index != 0)) {      if (((s->gr[0x0b] & 0x01) == 0) && (bank_index != 0)) {
1051          if (limit > 0x8000) {          if (limit > 0x8000) {
# Line 1213  cirrus_hook_write_sr(CirrusVGAState * s, Line 1213  cirrus_hook_write_sr(CirrusVGAState * s,
1213  #endif  #endif
1214          break;          break;
1215      case 0x17:                  // Configuration Readback and Extended Control      case 0x17:                  // Configuration Readback and Extended Control
1216          s->sr[reg_index] = reg_value;          s->sr[reg_index] = (s->sr[reg_index] & 0x38) | (reg_value & 0xc7);
1217          cirrus_update_memory_access(s);          cirrus_update_memory_access(s);
1218          break;          break;
1219      default:      default:

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  Added in v.1.19

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