98 |
void tb_invalidate_page_range(target_ulong start, target_ulong end); |
void tb_invalidate_page_range(target_ulong start, target_ulong end); |
99 |
void tlb_flush_page(CPUState *env, target_ulong addr); |
void tlb_flush_page(CPUState *env, target_ulong addr); |
100 |
void tlb_flush(CPUState *env, int flush_global); |
void tlb_flush(CPUState *env, int flush_global); |
101 |
int tlb_set_page(CPUState *env, target_ulong vaddr, |
int tlb_set_page_exec(CPUState *env, target_ulong vaddr, |
102 |
target_phys_addr_t paddr, int prot, |
target_phys_addr_t paddr, int prot, |
103 |
int is_user, int is_softmmu); |
int is_user, int is_softmmu); |
104 |
|
static inline int tlb_set_page(CPUState *env, target_ulong vaddr, |
105 |
|
target_phys_addr_t paddr, int prot, |
106 |
|
int is_user, int is_softmmu) |
107 |
|
{ |
108 |
|
if (prot & PAGE_READ) |
109 |
|
prot |= PAGE_EXEC; |
110 |
|
return tlb_set_page_exec(env, vaddr, paddr, prot, is_user, is_softmmu); |
111 |
|
} |
112 |
|
|
113 |
#define CODE_GEN_MAX_SIZE 65536 |
#define CODE_GEN_MAX_SIZE 65536 |
114 |
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ |
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ |
562 |
#else |
#else |
563 |
#error unimplemented CPU |
#error unimplemented CPU |
564 |
#endif |
#endif |
565 |
if (__builtin_expect(env->tlb_read[is_user][index].address != |
if (__builtin_expect(env->tlb_table[is_user][index].addr_code != |
566 |
(addr & TARGET_PAGE_MASK), 0)) { |
(addr & TARGET_PAGE_MASK), 0)) { |
567 |
ldub_code(addr); |
ldub_code(addr); |
568 |
} |
} |
569 |
pd = env->tlb_read[is_user][index].address & ~TARGET_PAGE_MASK; |
pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK; |
570 |
if (pd > IO_MEM_ROM) { |
if (pd > IO_MEM_ROM) { |
571 |
cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr); |
cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr); |
572 |
} |
} |
573 |
return addr + env->tlb_read[is_user][index].addend - (unsigned long)phys_ram_base; |
return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base; |
574 |
} |
} |
575 |
#endif |
#endif |
576 |
|
|