572 |
/* NOTE: this function can trigger an exception */ |
/* NOTE: this function can trigger an exception */ |
573 |
/* NOTE2: the returned address is not exactly the physical address: it |
/* NOTE2: the returned address is not exactly the physical address: it |
574 |
is the offset relative to phys_ram_base */ |
is the offset relative to phys_ram_base */ |
|
/* XXX: i386 target specific */ |
|
575 |
static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr) |
static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr) |
576 |
{ |
{ |
577 |
int is_user, index, pd; |
int is_user, index, pd; |
606 |
int kqemu_cpu_exec(CPUState *env); |
int kqemu_cpu_exec(CPUState *env); |
607 |
void kqemu_flush_page(CPUState *env, target_ulong addr); |
void kqemu_flush_page(CPUState *env, target_ulong addr); |
608 |
void kqemu_flush(CPUState *env, int global); |
void kqemu_flush(CPUState *env, int global); |
609 |
|
void kqemu_set_notdirty(CPUState *env, ram_addr_t ram_addr); |
610 |
|
|
611 |
static inline int kqemu_is_ok(CPUState *env) |
static inline int kqemu_is_ok(CPUState *env) |
612 |
{ |
{ |
615 |
(env->eflags & IOPL_MASK) != IOPL_MASK && |
(env->eflags & IOPL_MASK) != IOPL_MASK && |
616 |
(env->cr[0] & CR0_PE_MASK) && |
(env->cr[0] & CR0_PE_MASK) && |
617 |
(env->eflags & IF_MASK) && |
(env->eflags & IF_MASK) && |
618 |
!(env->eflags & VM_MASK) && |
!(env->eflags & VM_MASK) |
619 |
(env->ldt.limit == 0 || env->ldt.limit == 0x27)); |
#if 1 |
620 |
|
&& (env->ldt.limit == 0 || env->ldt.limit == 0x27) |
621 |
|
#endif |
622 |
|
); |
623 |
} |
} |
624 |
|
|
625 |
#endif |
#endif |