251 |
int error_code; |
int error_code; |
252 |
int exception_is_int; |
int exception_is_int; |
253 |
int exception_next_eip; |
int exception_next_eip; |
254 |
|
struct TranslationBlock *current_tb; /* currently executing TB */ |
255 |
uint32_t cr[5]; /* NOTE: cr1 is unused */ |
uint32_t cr[5]; /* NOTE: cr1 is unused */ |
256 |
uint32_t dr[8]; /* debug registers */ |
uint32_t dr[8]; /* debug registers */ |
257 |
int interrupt_request; /* if true, will exit from cpu_exec() ASAP */ |
int interrupt_request; /* if true, will exit from cpu_exec() ASAP */ |
259 |
request interrupt number */ |
request interrupt number */ |
260 |
int hard_interrupt_request; |
int hard_interrupt_request; |
261 |
int user_mode_only; /* user mode only simulation */ |
int user_mode_only; /* user mode only simulation */ |
262 |
|
|
263 |
/* user data */ |
/* user data */ |
264 |
void *opaque; |
void *opaque; |
265 |
} CPUX86State; |
} CPUX86State; |
295 |
|
|
296 |
/* MMU defines */ |
/* MMU defines */ |
297 |
void cpu_x86_init_mmu(CPUX86State *env); |
void cpu_x86_init_mmu(CPUX86State *env); |
|
extern CPUX86State *global_env; |
|
298 |
extern int phys_ram_size; |
extern int phys_ram_size; |
299 |
extern int phys_ram_fd; |
extern int phys_ram_fd; |
300 |
extern uint8_t *phys_ram_base; |
extern uint8_t *phys_ram_base; |