244 |
(unsigned long)env->segs[R_ES].base | |
(unsigned long)env->segs[R_ES].base | |
245 |
(unsigned long)env->segs[R_SS].base) != 0) << |
(unsigned long)env->segs[R_SS].base) != 0) << |
246 |
GEN_FLAG_ADDSEG_SHIFT; |
GEN_FLAG_ADDSEG_SHIFT; |
247 |
if (env->cr[0] & CR0_PE_MASK) { |
flags |= env->cpl << GEN_FLAG_CPL_SHIFT; |
248 |
if (!(env->eflags & VM_MASK)) |
flags |= (env->eflags & VM_MASK) >> (17 - GEN_FLAG_VM_SHIFT); |
|
flags |= (env->segs[R_CS].selector & 3) << |
|
|
GEN_FLAG_CPL_SHIFT; |
|
|
else |
|
|
flags |= (1 << GEN_FLAG_VM_SHIFT); |
|
|
} |
|
249 |
flags |= (env->eflags & (IOPL_MASK | TF_MASK)); |
flags |= (env->eflags & (IOPL_MASK | TF_MASK)); |
250 |
cs_base = env->segs[R_CS].base; |
cs_base = env->segs[R_CS].base; |
251 |
pc = cs_base + env->eip; |
pc = cs_base + env->eip; |