/[openvortex]/alsa/pci/au88x0/au88x0_eq.h
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revision 1.4 by mjander, Thu Aug 7 01:58:51 2003 UTC revision 1.5 by vizard, Sun Aug 10 20:00:34 2003 UTC
# Line 1  Line 1 
1  #define __NO_VERSION__  #ifndef AU88X0_EQ_H
2  #include "../../alsa-kernel/pci/au88x0/au88x0_eq.h"  #define AU88X0_EQ_H
3    
4    /***************************************************************************
5     *            au88x0_eq.h
6     *
7     *  Definitions and constant data for the Aureal Hardware EQ.
8     *
9     *  Sun Jun  8 18:23:38 2003
10     *  Author: Manuel Jander (mjander@users.sourceforge.net)
11     ****************************************************************************/
12    
13    typedef struct {
14            u16 LeftCoefs[50]; //0x4
15            u16 RightCoefs[50]; // 0x68
16            u16     LeftGains[20]; //0xd0
17            u16 RightGains[20]; //0xe4
18    } auxxEqCoeffSet_t;
19    
20    typedef struct {
21            unsigned int *this00; /*CAsp4HwIO*/
22            long this04;  /* How many filters for each side (default = 10) */
23            long this08;  /* inited to cero. Stereo flag? */
24    } eqhw_t;
25    
26    typedef struct {
27            unsigned int *this00; /*CAsp4Core*/
28            eqhw_t this04; /* CHwEq */
29            short this08; /* Bad codec flag ? SetBypassGain: bypass gain */
30            short this0a;
31            short this0c; /* SetBypassGain: bypass gain when this28 is not set. */
32            short this0e;
33            
34            long this10; /* How many gains are used for each side (right or left). */
35            u16 this14[32]; /* SetLeftGainsTarget: Left (and right?) EQ gains  */
36            long this24;
37            long this28; /* flag related to EQ enabled or not. Gang flag ? */
38            long this54; /* SetBypass */
39            long this58;
40            long this5c;
41            /*0x60*/ auxxEqCoeffSet_t coefset; /* 50 u16 word each channel. */
42            u16 this130[20]; /* Left and Right gains */
43    } eqlzr_t;
44    
45    #endif

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