1812 |
hwwrite(card->mmio, VORTEX_CTRL, hwread(card->mmio, VORTEX_CTRL) & ~CTRL_IRQ_ENABLE); |
hwwrite(card->mmio, VORTEX_CTRL, hwread(card->mmio, VORTEX_CTRL) & ~CTRL_IRQ_ENABLE); |
1813 |
} |
} |
1814 |
|
|
1815 |
void vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs) { |
irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs) { |
1816 |
vortex_t *vortex = snd_magic_cast(vortex_t, dev_id, return); |
vortex_t *vortex = snd_magic_cast(vortex_t, dev_id, return IRQ_NONE); |
1817 |
int source, i; |
int i, handled; |
1818 |
|
u32 source; |
1819 |
//check if the interrupt is ours. |
//check if the interrupt is ours. |
1820 |
if (!(hwread(vortex->mmio, VORTEX_IRQ_U0) & 0x1)) |
if (!(hwread(vortex->mmio, VORTEX_IRQ_U0) & 0x1)) |
1821 |
return; |
return IRQ_NONE; |
1822 |
|
|
1823 |
// This is the Interrrupt Enable flag we set before (consistency check). |
// This is the Interrrupt Enable flag we set before (consistency check). |
1824 |
if (!((hwread(vortex->mmio, VORTEX_CTRL) & 0x0000ff00) != CTRL_IRQ_ENABLE)) |
if ((hwread(vortex->mmio, VORTEX_CTRL) & 0x0000ff00) == CTRL_IRQ_ENABLE) |
1825 |
return; |
return IRQ_HANDLED; |
1826 |
|
|
1827 |
source = hwread(vortex->mmio, VORTEX_IRQ_SOURCE); |
source = hwread(vortex->mmio, VORTEX_IRQ_SOURCE); |
1828 |
// Reset IRQ flags. |
// Reset IRQ flags. |
1829 |
hwwrite(vortex->mmio, VORTEX_IRQ_SOURCE, source & 0xffffffff); |
hwwrite(vortex->mmio, VORTEX_IRQ_SOURCE, source); |
1830 |
hwread(vortex->mmio, VORTEX_IRQ_SOURCE); |
hwread(vortex->mmio, VORTEX_IRQ_SOURCE); |
1831 |
// Is at least one IRQ flag set? |
// Is at least one IRQ flag set? |
1832 |
if (source == 0) |
if (source == 0) { |
1833 |
return; |
printk(KERN_ERR "vortex: missing irq source\n"); |
1834 |
|
return IRQ_NONE; |
1835 |
|
} |
1836 |
|
|
1837 |
//printk(KERN_INFO "IRQ: 0x%x\n", source); |
//printk(KERN_INFO "IRQ: 0x%x\n", source); |
1838 |
|
|
1839 |
|
handled = 0; |
1840 |
// Attend every interrupt source. |
// Attend every interrupt source. |
1841 |
if (source & IRQ_FATAL) |
if (source & IRQ_FATAL) { |
1842 |
printk(KERN_ERR "vortex: IRQ fatal error\n"); |
printk(KERN_ERR "vortex: IRQ fatal error\n"); |
1843 |
if (source & IRQ_PARITY) |
handled = 1; |
1844 |
|
} |
1845 |
|
if (source & IRQ_PARITY) { |
1846 |
printk(KERN_ERR "vortex: IRQ parity error\n"); |
printk(KERN_ERR "vortex: IRQ parity error\n"); |
1847 |
|
handled = 1; |
1848 |
|
} |
1849 |
if (source & IRQ_PCMOUT) { |
if (source & IRQ_PCMOUT) { |
1850 |
/* ALSA period acknowledge. */ |
/* ALSA period acknowledge. */ |
1851 |
for (i=0; i<NR_ADB; i++) { |
for (i=0; i<NR_ADB; i++) { |
1852 |
if (vortex->dma_adb[i].fifo_status == FIFO_START) { |
if (vortex->dma_adb[i].fifo_status == FIFO_START) { |
1853 |
vortex_adbdma_bufshift(vortex, i); |
vortex_adbdma_bufshift(vortex, i); |
1854 |
snd_pcm_period_elapsed(vortex->dma_adb[i].substream); |
snd_pcm_period_elapsed(vortex->dma_adb[i].substream); |
1855 |
} |
} |
1856 |
} |
} |
1857 |
for (i=0; i<NR_WT; i++) { |
for (i=0; i<NR_WT; i++) { |
1858 |
if (vortex->dma_wt[i].fifo_status == FIFO_START) { |
if (vortex->dma_wt[i].fifo_status == FIFO_START) { |
1859 |
vortex_wtdma_bufshift(vortex, i); |
vortex_wtdma_bufshift(vortex, i); |
1860 |
snd_pcm_period_elapsed(vortex->dma_wt[i].substream); |
snd_pcm_period_elapsed(vortex->dma_wt[i].substream); |
1861 |
} |
} |
1862 |
} |
} |
1863 |
|
handled = 1; |
1864 |
} |
} |
1865 |
//Acknowledge the Timer interrupt |
//Acknowledge the Timer interrupt |
1866 |
if (source & IRQ_TIMER) |
if (source & IRQ_TIMER) { |
1867 |
hwread(vortex->mmio, VORTEX_IRQ_STAT); |
hwread(vortex->mmio, VORTEX_IRQ_STAT); |
1868 |
|
handled = 1; |
1869 |
if (source & IRQ_MIDI) |
} |
1870 |
|
if (source & IRQ_MIDI) { |
1871 |
snd_mpu401_uart_interrupt(vortex->irq, vortex->rmidi->private_data, regs); |
snd_mpu401_uart_interrupt(vortex->irq, vortex->rmidi->private_data, regs); |
1872 |
|
handled = 1; |
1873 |
|
} |
1874 |
|
|
1875 |
|
if (!handled) { |
1876 |
|
printk(KERN_ERR "vortex: unknown irq source %x\n", source); |
1877 |
|
} |
1878 |
|
return IRQ_RETVAL(handled); |
1879 |
} |
} |
1880 |
|
|
1881 |
/* Codec */ |
/* Codec */ |