64 |
#define VORTEX_WTDMA_BUFCFG1 0x27604 |
#define VORTEX_WTDMA_BUFCFG1 0x27604 |
65 |
#define VORTEX_WTDMA_START 0x27b00 /* which subbuffer is first */ |
#define VORTEX_WTDMA_START 0x27b00 /* which subbuffer is first */ |
66 |
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67 |
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#define VORTEX_WT_BASE (0x420 << 7) |
68 |
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69 |
/* ADB */ |
/* ADB */ |
70 |
#define VORTEX_ADB_SR 0x28400 /* Samplerates enable/disable */ |
#define VORTEX_ADB_SR 0x28400 /* Samplerates enable/disable */ |
71 |
#define VORTEX_ADB_RTBASE 0x28000 |
#define VORTEX_ADB_RTBASE 0x28000 |
88 |
#define OFFSET_SPORTOUT 0x90 |
#define OFFSET_SPORTOUT 0x90 |
89 |
#define OFFSET_EQIN 0xa0 |
#define OFFSET_EQIN 0xa0 |
90 |
#define OFFSET_EQOUT 0x7e /* 2 routes on ch 0x11 */ |
#define OFFSET_EQOUT 0x7e /* 2 routes on ch 0x11 */ |
91 |
#define OFFSET_WTOUT 0xa2 |
#define OFFSET_WTOUT 0x62 |
92 |
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93 |
/* ADB route translate helper */ |
/* ADB route translate helper */ |
94 |
#define ADB_DMA(x) (x) |
#define ADB_DMA(x) (x) |
104 |
#define ADB_EQOUT(x) (x + OFFSET_EQOUT) |
#define ADB_EQOUT(x) (x + OFFSET_EQOUT) |
105 |
#define ADB_A3DOUT(x) (x + 0x50) /* 0x10 A3D blocks */ |
#define ADB_A3DOUT(x) (x + 0x50) /* 0x10 A3D blocks */ |
106 |
#define ADB_A3DIN(x) (x + 0x70) |
#define ADB_A3DIN(x) (x + 0x70) |
107 |
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#define ADB_WTOUT(x) (x + OFFSET_WTOUT) |
108 |
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109 |
#define MIX_OUTL 0xe |
#define MIX_DEFIGAIN 0x08 |
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#define MIX_OUTR 0xf |
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#define MIX_INL 0x1e |
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#define MIX_INR 0x1f |
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#define MIX_DEFIGAIN 0x00 |
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110 |
#define MIX_DEFOGAIN 0x00 /* 0x8->6dB (6dB = x4) 16 to 18 bit conversion? */ |
#define MIX_DEFOGAIN 0x00 /* 0x8->6dB (6dB = x4) 16 to 18 bit conversion? */ |
111 |
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112 |
/* MIXER */ |
/* MIXER */ |
153 |
#define FIFO_SIZE_BITS 6 |
#define FIFO_SIZE_BITS 6 |
154 |
#define FIFO_SIZE (1<<(FIFO_SIZE_BITS)) // 0x40 |
#define FIFO_SIZE (1<<(FIFO_SIZE_BITS)) // 0x40 |
155 |
#define FIFO_MASK (FIFO_SIZE-1) //0x3f /* at shift left 0xc */ |
#define FIFO_MASK (FIFO_SIZE-1) //0x3f /* at shift left 0xc */ |
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//#define FIFO_MASK 0x3f /* at shift left 0xc */ |
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//#define FIFO_SIZE 0x40 |
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156 |
#define FIFO_BITS 0x1c400000 |
#define FIFO_BITS 0x1c400000 |
157 |
#define VORTEX_FIFO_ADBDATA 0x14000 |
#define VORTEX_FIFO_ADBDATA 0x14000 |
158 |
#define VORTEX_FIFO_WTDATA 0x10000 |
#define VORTEX_FIFO_WTDATA 0x10000 |
160 |
/* CODEC */ |
/* CODEC */ |
161 |
#define VORTEX_CODEC_CTRL 0x29184 |
#define VORTEX_CODEC_CTRL 0x29184 |
162 |
#define VORTEX_CODEC_EN 0x29190 |
#define VORTEX_CODEC_EN 0x29190 |
163 |
#define EN_CODEC 0x00000300 |
#define EN_AUDIO0 0x00000300 |
164 |
#define EN_CODEC2 0x00003000 |
#define EN_MODEM 0x00000c00 |
165 |
#define EN_SPORT 0x00030000 |
#define EN_AUDIO1 0x00003000 |
166 |
#define EN_SPDIF 0x000c0000 |
#define EN_SPORT 0x00030000 |
167 |
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#define EN_SPDIF 0x000c0000 |
168 |
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#define EN_CODEC (EN_AUDIO1 | EN_AUDIO0) |
169 |
#define VORTEX_CODEC_CHN 0x29080 |
#define VORTEX_CODEC_CHN 0x29080 |
170 |
#define VORTEX_CODEC_WRITE 0x00800000 |
#define VORTEX_CODEC_WRITE 0x00800000 |
171 |
#define VORTEX_CODEC_ADDSHIFT 16 |
#define VORTEX_CODEC_ADDSHIFT 16 |