931 |
unsigned long port; /* I/O port number */ |
unsigned long port; /* I/O port number */ |
932 |
struct resource *res_port; |
struct resource *res_port; |
933 |
int APS: 1, /* APS flag */ |
int APS: 1, /* APS flag */ |
934 |
|
no_ac97: 1, /* no AC'97 */ |
935 |
tos_link: 1; /* tos link detected */ |
tos_link: 1; /* tos link detected */ |
936 |
unsigned int audigy; /* is Audigy? */ |
unsigned int audigy; /* is Audigy? */ |
937 |
unsigned int revision; /* chip revision */ |
unsigned int revision; /* chip revision */ |
1347 |
|
|
1348 |
#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, emu10k1_fx8010_info_t) |
#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, emu10k1_fx8010_info_t) |
1349 |
#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, emu10k1_fx8010_code_t) |
#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, emu10k1_fx8010_code_t) |
1350 |
#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOW ('H', 0x12, emu10k1_fx8010_code_t) |
#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, emu10k1_fx8010_code_t) |
1351 |
#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int) |
#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int) |
1352 |
#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, emu10k1_fx8010_tram_t) |
#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, emu10k1_fx8010_tram_t) |
1353 |
#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOR ('H', 0x22, emu10k1_fx8010_tram_t) |
#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, emu10k1_fx8010_tram_t) |
1354 |
#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, emu10k1_fx8010_pcm_t) |
#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, emu10k1_fx8010_pcm_t) |
1355 |
#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, emu10k1_fx8010_pcm_t) |
#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, emu10k1_fx8010_pcm_t) |
1356 |
#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80) |
#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80) |