31 |
&& (m)->debug_printer) |
&& (m)->debug_printer) |
32 |
#define INSTR_DISASS(m) ((m)->debug_level & MU_SIEVE_DEBUG_DISAS) |
#define INSTR_DISASS(m) ((m)->debug_level & MU_SIEVE_DEBUG_DISAS) |
33 |
|
|
34 |
|
void |
35 |
|
instr_nop (sieve_machine_t mach) |
36 |
|
{ |
37 |
|
if (INSTR_DEBUG (mach)) |
38 |
|
sieve_debug (mach, "%4lu: NOP\n", |
39 |
|
(unsigned long) (mach->pc - 1)); |
40 |
|
} |
41 |
|
|
42 |
static int |
static int |
43 |
instr_run (sieve_machine_t mach) |
instr_run (sieve_machine_t mach) |
44 |
{ |
{ |
121 |
} |
} |
122 |
|
|
123 |
void |
void |
|
instr_allof (sieve_machine_t mach) |
|
|
{ |
|
|
int num = SIEVE_ARG (mach, 0, number); |
|
|
int val = 1; |
|
|
|
|
|
SIEVE_ADJUST(mach, 1); |
|
|
|
|
|
if (INSTR_DEBUG (mach)) |
|
|
{ |
|
|
sieve_debug (mach, "%4lu: ALLOF %d\n", (unsigned long)(mach->pc - 2), |
|
|
num); |
|
|
if (INSTR_DISASS (mach)) |
|
|
return; |
|
|
} |
|
|
|
|
|
while (num-- > 0) |
|
|
{ |
|
|
instr_pop (mach); |
|
|
val &= mach->reg; |
|
|
} |
|
|
mach->reg = val; |
|
|
} |
|
|
|
|
|
void |
|
|
instr_anyof (sieve_machine_t mach) |
|
|
{ |
|
|
int num = SIEVE_ARG (mach, 0, number); |
|
|
int val = 0; |
|
|
|
|
|
SIEVE_ADJUST(mach, 1); |
|
|
|
|
|
if (INSTR_DEBUG (mach)) |
|
|
{ |
|
|
sieve_debug (mach, "%4lu: ANYOF %d\n", (unsigned long)(mach->pc - 2), |
|
|
num); |
|
|
if (INSTR_DISASS (mach)) |
|
|
return; |
|
|
} |
|
|
|
|
|
while (num-- > 0) |
|
|
{ |
|
|
instr_pop (mach); |
|
|
val |= mach->reg; |
|
|
} |
|
|
mach->reg = val; |
|
|
} |
|
|
|
|
|
void |
|
124 |
instr_not (sieve_machine_t mach) |
instr_not (sieve_machine_t mach) |
125 |
{ |
{ |
126 |
if (INSTR_DEBUG (mach)) |
if (INSTR_DEBUG (mach)) |
169 |
mach->pc += num; |
mach->pc += num; |
170 |
} |
} |
171 |
|
|
172 |
|
void |
173 |
|
instr_brnz (sieve_machine_t mach) |
174 |
|
{ |
175 |
|
long num = SIEVE_ARG (mach, 0, number); |
176 |
|
SIEVE_ADJUST (mach, 1); |
177 |
|
|
178 |
|
if (INSTR_DEBUG (mach)) |
179 |
|
{ |
180 |
|
sieve_debug (mach, "%4lu: BRNZ %lu\n", |
181 |
|
(unsigned long)(mach->pc-2), |
182 |
|
(unsigned long)(mach->pc + num)); |
183 |
|
if (INSTR_DISASS (mach)) |
184 |
|
return; |
185 |
|
} |
186 |
|
|
187 |
|
if (mach->reg) |
188 |
|
mach->pc += num; |
189 |
|
} |
190 |
|
|
191 |
void |
void |
192 |
sieve_abort (sieve_machine_t mach) |
sieve_abort (sieve_machine_t mach) |
193 |
{ |
{ |