/[hurd]/hurd-l4/libl4/powerpc/l4/bits/syscall.h
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revision 1.7 by marcus, Tue Aug 3 11:48:56 2004 UTC revision 1.8 by marcus, Thu Oct 7 17:56:25 2004 UTC
# Line 31  Line 31 
31    
32  /* These are the clobber registers.  R1, R2, R30, R31, and all  /* These are the clobber registers.  R1, R2, R30, R31, and all
33     floating point registers are preserved.  R3 to R10 are used in     floating point registers are preserved.  R3 to R10 are used in
34     system calls and thus are not in this list.  Up to R17 is used in     system calls and thus are not in this list.  Up to R19 is used in
35     the IPC system calls.  */     the memory_control system call.  */
36  #define __L4_PPC_XCLOB "r18", "r19",                                    \  #define __L4_PPC_XCLOB                                                  \
37    "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \    "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
38    "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", "xer",        \    "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", "xer",        \
39    "ctr", "lr", "memory"    "ctr", "lr", "memory"
40  #define __L4_PPC_CLOB "r0", "r11", "r12", "r13", "r14", "r15", "r16",   \  #define __L4_PPC_CLOB "r0", "r11", "r12", "r13", "r14", "r15", "r16",   \
41    "r17", __L4_PPC_XCLOB    "r17", "r18", "r19", __L4_PPC_XCLOB
42    
43    
44  /* Return the pointer to the kernel interface page, the API version,  /* Return the pointer to the kernel interface page, the API version,
# Line 127  static inline _L4_clock_t Line 127  static inline _L4_clock_t
127  _L4_attribute_always_inline  _L4_attribute_always_inline
128  _L4_system_clock (void)  _L4_system_clock (void)
129  {  {
130    register _L4_word_t time_low asm ("r3");    register _L4_word_t time_high asm ("r3");
131    register _L4_word_t time_high asm ("r4");    register _L4_word_t time_low asm ("r4");
132    
133    __asm__ __volatile__ ("mtctr %[addr]\n"    __asm__ __volatile__ ("mtctr %[addr]\n"
134                          "bctrl\n"                          "bctrl\n"
135                          : "=r" (time_low), "=r" (time_high)                          : "=r" (time_high), "=r" (time_low)
136                          : [addr] "r" (__l4_system_clock)                          : [addr] "r" (__l4_system_clock)
137                          : "r5", "r6", "r7", "r8", "r9", "r10",                          : "r5", "r6", "r7", "r8", "r9", "r10",
138                          __L4_PPC_CLOB);                          __L4_PPC_CLOB);
# Line 151  _L4_thread_switch (_L4_thread_id_t dest) Line 151  _L4_thread_switch (_L4_thread_id_t dest)
151                          "bctrl\n"                          "bctrl\n"
152                          :                          :
153                          : "r" (dest_raw), [addr] "r" (__l4_thread_switch)                          : "r" (dest_raw), [addr] "r" (__l4_thread_switch)
154                          : __L4_PPC_CLOB);                          : "r4", "r5", "r6", "r7", "r8", "r9", "r10",
155                            __L4_PPC_CLOB);
156  }  }
157    
158    
# Line 183  static inline void Line 184  static inline void
184  _L4_attribute_always_inline  _L4_attribute_always_inline
185  _L4_unmap (_L4_word_t control)  _L4_unmap (_L4_word_t control)
186  {  {
187    register _L4_word_t ctrl asm ("r3") = control;    _L4_word_t *mr = _L4_utcb () + _L4_UTCB_MR0;
188      register _L4_word_t mr9 asm ("r0") = mr[9];
189      register _L4_word_t mr1 asm ("r3") = mr[1];
190      register _L4_word_t mr2 asm ("r4") = mr[2];
191      register _L4_word_t mr3 asm ("r5") = mr[3];
192      register _L4_word_t mr4 asm ("r6") = mr[4];
193      register _L4_word_t mr5 asm ("r7") = mr[5];
194      register _L4_word_t mr6 asm ("r8") = mr[6];
195      register _L4_word_t mr7 asm ("r9") = mr[7];
196      register _L4_word_t mr8 asm ("r10") = mr[8];
197      register _L4_word_t mr0 asm ("r14") = mr[0];
198      register _L4_word_t ctrl asm ("r15") = control;
199    
200    __asm__ __volatile__ ("mtctr %[addr]\n"    __asm__ __volatile__ ("mtctr %[addr]\n"
201                          "bctrl\n"                          "bctrl\n"
202                          :                          : "+r" (mr9), "+r" (mr1), "+r" (mr2), "+r" (mr3),
203                            "+r" (mr4), "+r" (mr5), "+r" (mr6), "+r" (mr7),
204                            "+r" (mr8), "+r" (mr0)
205                          : "r" (ctrl), [addr] "r" (__l4_unmap)                          : "r" (ctrl), [addr] "r" (__l4_unmap)
206                          : "r4", "r5", "r6", "r7", "r8", "r9", "r10",                          : "r11", "r12", "r13", "r16", "r17", "r18", "r19",
207                          __L4_PPC_CLOB);                          __L4_PPC_XCLOB);
208    
209      mr[0] = mr0;
210      mr[1] = mr1;
211      mr[2] = mr2;
212      mr[3] = mr3;
213      mr[4] = mr4;
214      mr[5] = mr5;
215      mr[6] = mr6;
216      mr[7] = mr7;
217      mr[8] = mr8;
218      mr[9] = mr9;
219  }  }
220    
221    
# Line 245  _L4_ipc (_L4_thread_id_t to, _L4_thread_ Line 270  _L4_ipc (_L4_thread_id_t to, _L4_thread_
270                          "+r" (mr8), "+r" (mr0), "+r" (from_spec_raw)                          "+r" (mr8), "+r" (mr0), "+r" (from_spec_raw)
271                          : "r" (to_raw), "r" (time_outs),                          : "r" (to_raw), "r" (time_outs),
272                          [addr] "r" (__l4_ipc)                          [addr] "r" (__l4_ipc)
273                          : "r11", "r12", "r13", __L4_PPC_XCLOB);                          : "r11", "r12", "r13", "r18", "r19",
274                            __L4_PPC_XCLOB);
275    
276    /* FIXME: Make it so that we can use l4_is_nilthread?  */    /* FIXME: Make it so that we can use l4_is_nilthread?  */
277    if (from_spec_raw)    if (from_spec_raw)
# Line 292  _L4_lipc (_L4_thread_id_t to, _L4_thread Line 318  _L4_lipc (_L4_thread_id_t to, _L4_thread
318                          "+r" (mr8), "+r" (mr0), "+r" (from_spec_raw)                          "+r" (mr8), "+r" (mr0), "+r" (from_spec_raw)
319                          : "r" (to_raw), "r" (time_outs),                          : "r" (to_raw), "r" (time_outs),
320                          [addr] "r" (__l4_lipc)                          [addr] "r" (__l4_lipc)
321                          : "r11", "r12", "r13", __L4_PPC_XCLOB);                          : "r11", "r12", "r13", "r18", "r19",
322                            __L4_PPC_XCLOB);
323    
324    /* FIXME: Make it so that we can use l4_is_nilthread?  */    /* FIXME: Make it so that we can use l4_is_nilthread?  */
325    if (from_spec_raw)    if (from_spec_raw)
# Line 338  static inline _L4_word_t Line 365  static inline _L4_word_t
365  _L4_attribute_always_inline  _L4_attribute_always_inline
366  _L4_memory_control (_L4_word_t control, _L4_word_t *attributes)  _L4_memory_control (_L4_word_t control, _L4_word_t *attributes)
367  {  {
368    register _L4_word_t ctrl_result asm ("r3") = control;    _L4_word_t *mr = _L4_utcb () + _L4_UTCB_MR0;
369    register _L4_word_t attr0 asm ("r4") = attributes[0];    register _L4_word_t mr9 asm ("r0")  = mr[9];
370    register _L4_word_t attr1 asm ("r5") = attributes[1];    register _L4_word_t mr1_result asm ("r3") = mr[1];
371    register _L4_word_t attr2 asm ("r6") = attributes[2];    register _L4_word_t mr2 asm ("r4") = mr[2];
372    register _L4_word_t attr3 asm ("r7") = attributes[3];    register _L4_word_t mr3 asm ("r5") = mr[3];
373      register _L4_word_t mr4 asm ("r6") = mr[4];
374      register _L4_word_t mr5 asm ("r7") = mr[5];
375      register _L4_word_t mr6 asm ("r8") = mr[6];
376      register _L4_word_t mr7 asm ("r9") = mr[7];
377      register _L4_word_t mr8 asm ("r10") = mr[8];
378      register _L4_word_t mr0 asm ("r14") = mr[0];
379      register _L4_word_t ctrl asm ("r15") = control;
380      register _L4_word_t attr0 asm ("r16") = attributes[0];
381      register _L4_word_t attr1 asm ("r17") = attributes[1];
382      register _L4_word_t attr2 asm ("r18") = attributes[2];
383      register _L4_word_t attr3 asm ("r19") = attributes[3];
384    
385    __asm__ __volatile__ ("mtctr %[addr]\n"    __asm__ __volatile__ ("mtctr %[addr]\n"
386                          "bctrl\n"                          "bctrl\n"
387                          : "+r" (ctrl_result)                          : "+r" (mr1_result)
388                          : "r" (ctrl_result), "r" (attr0), "r" (attr1),                          : "r" (mr9), "r" (mr2), "r" (mr3), "r" (mr4),
389                            "r" (mr5), "r" (mr6), "r" (mr7), "r" (mr8),
390                            "r" (mr0), "r" (ctrl), "r" (attr0), "r" (attr1),
391                          "r" (attr2), "r" (attr3),                          "r" (attr2), "r" (attr3),
392                          [addr] "r" (__l4_memory_control)                          [addr] "r" (__l4_memory_control)
393                          : "r8", "r9", "r10", __L4_PPC_CLOB);                          : __L4_PPC_XCLOB);
394    
395    return ctrl_result;    return mr1_result;
396  }  }

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