10 |
#define VMV1 vs_reserve(6); |
#define VMV1 vs_reserve(6); |
11 |
#define VMR1(VMT1) vs_top=base ; return(VMT1); |
#define VMR1(VMT1) vs_top=base ; return(VMT1); |
12 |
static object LI2(); |
static object LI2(); |
13 |
#define VMB2 register object *base=vs_top; object V33 ,V32 ,V31 ,V30 ,V29 ,V27 ,V26 ,V25 ,V21; |
#define VMB2 register object *base=vs_top; object V34 ,V33 ,V31 ,V30 ,V27 ,V26; |
14 |
#define VMS2 register object *sup=vs_top+6;vs_top=sup; |
#define VMS2 register object *sup=vs_top+7;vs_top=sup; |
15 |
#define VMV2 vs_reserve(6); |
#define VMV2 vs_reserve(7); |
16 |
#define VMR2(VMT2) vs_top=base ; return(VMT2); |
#define VMR2(VMT2) vs_top=base ; return(VMT2); |
17 |
#define VC3 object V56 ,V55 ,V54 ,V53 ,V52 ,V51 ,V50 ,V48 ,V46 ,V43; |
#define VC3 object V58 ,V57 ,V56 ,V55 ,V54 ,V53 ,V52 ,V48; |
18 |
static object LI4(); |
static object LI4(); |
19 |
#define VMB4 register object *base=vs_top; object V94 ,V93 ,V90 ,V89 ,V88 ,V82 ,V81 ,V80 ,V74; |
#define VMB4 register object *base=vs_top; object V98 ,V97 ,V93 ,V92 ,V85 ,V84; |
20 |
#define VMS4 register object *sup=vs_top+6;vs_top=sup; |
#define VMS4 register object *sup=vs_top+7;vs_top=sup; |
21 |
#define VMV4 vs_reserve(6); |
#define VMV4 vs_reserve(7); |
22 |
#define VMR4(VMT4) vs_top=base ; return(VMT4); |
#define VMR4(VMT4) vs_top=base ; return(VMT4); |
23 |
#define VC5 object V118 ,V117 ,V116 ,V114 ,V111 ,V106 ,V105 ,V104 ,V103; |
#define VC5 object V123 ,V122 ,V119 ,V110 ,V109 ,V108 ,V107; |
24 |
static object LI6(); |
static object LI6(); |
25 |
#define VMB6 register object *base=vs_top; object V130 ,V129 ,V128; |
#define VMB6 register object *base=vs_top; object V135 ,V134; |
26 |
#define VMS6 register object *sup=vs_top+4;vs_top=sup; |
#define VMS6 register object *sup=vs_top+5;vs_top=sup; |
27 |
#define VMV6 vs_reserve(4); |
#define VMV6 vs_reserve(5); |
28 |
#define VMR6(VMT6) vs_top=base ; return(VMT6); |
#define VMR6(VMT6) vs_top=base ; return(VMT6); |
29 |
static object LI7(); |
static object LI7(); |
30 |
#define VMB7 register object *base=vs_top; object V139; |
#define VMB7 register object *base=vs_top; object V144; |
31 |
#define VMS7 vs_top += 1; |
#define VMS7 vs_top += 1; |
32 |
#define VMV7 vs_reserve(1); |
#define VMV7 vs_reserve(1); |
33 |
#define VMR7(VMT7) vs_top=base ; return(VMT7); |
#define VMR7(VMT7) vs_top=base ; return(VMT7); |
34 |
static object LI8(); |
static object LI8(); |
35 |
#define VMB8 register object *base=vs_top; object V146; |
#define VMB8 register object *base=vs_top; object V151; |
36 |
#define VMS8 vs_top += 1; |
#define VMS8 vs_top += 1; |
37 |
#define VMV8 vs_reserve(1); |
#define VMV8 vs_reserve(1); |
38 |
#define VMR8(VMT8) vs_top=base ; return(VMT8); |
#define VMR8(VMT8) vs_top=base ; return(VMT8); |
39 |
static object LI9(); |
static object LI9(); |
40 |
#define VMB9 register object *base=vs_top; object V155; |
#define VMB9 register object *base=vs_top; object V160; |
41 |
#define VMS9 vs_top += 1; |
#define VMS9 vs_top += 1; |
42 |
#define VMV9 vs_reserve(1); |
#define VMV9 vs_reserve(1); |
43 |
#define VMR9(VMT9) vs_top=base ; return(VMT9); |
#define VMR9(VMT9) vs_top=base ; return(VMT9); |
44 |
static object LI10(); |
static object LI10(); |
45 |
#define VMB10 register object *base=vs_top; object V172 ,V171 ,V170 ,V167 ,V166 ,V162 ,V161; |
#define VMB10 register object *base=vs_top; object V177 ,V176 ,V175 ,V172 ,V171 ,V167 ,V166; |
46 |
#define VMS10 vs_top += 5; |
#define VMS10 vs_top += 5; |
47 |
#define VMV10 vs_reserve(5); |
#define VMV10 vs_reserve(5); |
48 |
#define VMR10(VMT10) vs_top=base ; return(VMT10); |
#define VMR10(VMT10) vs_top=base ; return(VMT10); |
50 |
#define VM9 1 |
#define VM9 1 |
51 |
#define VM8 1 |
#define VM8 1 |
52 |
#define VM7 1 |
#define VM7 1 |
53 |
#define VM6 4 |
#define VM6 5 |
54 |
#define VM5 6 |
#define VM5 7 |
55 |
#define VM4 6 |
#define VM4 7 |
56 |
#define VM3 7 |
#define VM3 8 |
57 |
#define VM2 6 |
#define VM2 7 |
58 |
#define VM1 6 |
#define VM1 6 |
59 |
static char * VVi[69]={ |
static char * VVi[69]={ |
60 |
#define Cdata VV[68] |
#define Cdata VV[68] |