1 |
/* Opcode table header for m680[01234]0/m6888[12]/m68851. |
/* Opcode table header for m680[01234]0/m6888[12]/m68851. |
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Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001 |
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001, |
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Free Software Foundation, Inc. |
2003, 2004 Free Software Foundation, Inc. |
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|
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This file is part of GDB, GAS, and the GNU binutils. |
This file is part of GDB, GAS, and the GNU binutils. |
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|
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GDB, GAS, and the GNU binutils are free software; you can redistribute |
GDB, GAS, and the GNU binutils are free software; you can redistribute |
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them and/or modify them under the terms of the GNU General Public |
them and/or modify them under the terms of the GNU General Public |
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License as published by the Free Software Foundation; either version |
License as published by the Free Software Foundation; either version |
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1, or (at your option) any later version. |
1, or (at your option) any later version. |
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GDB, GAS, and the GNU binutils are distributed in the hope that they |
GDB, GAS, and the GNU binutils are distributed in the hope that they |
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will be useful, but WITHOUT ANY WARRANTY; without even the implied |
will be useful, but WITHOUT ANY WARRANTY; without even the implied |
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
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the GNU General Public License for more details. |
the GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
You should have received a copy of the GNU General Public License |
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along with this file; see the file COPYING. If not, write to the Free |
along with this file; see the file COPYING. If not, write to the Free |
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
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02111-1307, USA. */ |
02111-1307, USA. */ |
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/* These are used as bit flags for the arch field in the m68k_opcode |
/* These are used as bit flags for the arch field in the m68k_opcode |
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structure. */ |
structure. */ |
24 |
#define _m68k_undef 0 |
#define _m68k_undef 0 |
25 |
#define m68000 0x001 |
#define m68000 0x001 |
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#define m68008 m68000 /* synonym for -m68000. otherwise unused. */ |
#define m68008 m68000 /* Synonym for -m68000. otherwise unused. */ |
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#define m68010 0x002 |
#define m68010 0x002 |
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#define m68020 0x004 |
#define m68020 0x004 |
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#define m68030 0x008 |
#define m68030 0x008 |
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#define m68ec030 m68030 /* similar enough to -m68030 to ignore differences; |
#define m68ec030 m68030 /* Similar enough to -m68030 to ignore differences; |
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gas will deal with the few differences. */ |
gas will deal with the few differences. */ |
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#define m68040 0x010 |
#define m68040 0x010 |
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/* there is no 68050 */ |
/* There is no 68050. */ |
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#define m68060 0x020 |
#define m68060 0x020 |
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#define m68881 0x040 |
#define m68881 0x040 |
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#define m68882 m68881 /* synonym for -m68881. otherwise unused. */ |
#define m68882 m68881 /* Synonym for -m68881. otherwise unused. */ |
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#define m68851 0x080 |
#define m68851 0x080 |
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#define cpu32 0x100 /* e.g., 68332 */ |
#define cpu32 0x100 /* e.g., 68332 */ |
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#define mcf5200 0x200 |
|
40 |
#define mcf5206e 0x400 |
#define mcfmac 0x200 /* ColdFire MAC. */ |
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#define mcf5307 0x800 |
#define mcfemac 0x400 /* ColdFire EMAC. */ |
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#define mcf5407 0x1000 |
#define cfloat 0x800 /* ColdFire FPU. */ |
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|
#define mcfhwdiv 0x1000 /* ColdFire hardware divide. */ |
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/* handy aliases */ |
|
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#define m68040up (m68040 | m68060) |
#define mcfisa_a 0x2000 /* ColdFire ISA_A. */ |
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#define m68030up (m68030 | m68040up) |
#define mcfisa_aa 0x4000 /* ColdFire ISA_A+. */ |
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#define m68020up (m68020 | m68030up) |
#define mcfisa_b 0x8000 /* ColdFire ISA_B. */ |
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#define m68010up (m68010 | cpu32 | m68020up) |
#define mcfusp 0x10000 /* ColdFire USP instructions. */ |
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#define m68000up (m68000 | m68010up) |
|
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#define mcf (mcf5200 | mcf5206e | mcf5307 | mcf5407) |
#define mcf5200 0x20000 |
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#define mcf5307up (mcf5307 | mcf5407) |
#define mcf5206e 0x40000 |
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#define mcf521x 0x80000 |
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#define mcf5249 0x100000 |
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#define mcf528x 0x200000 |
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#define mcf5307 0x400000 |
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#define mcf5407 0x800000 |
57 |
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#define mcf5470 0x1000000 |
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#define mcf5480 0x2000000 |
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60 |
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/* Handy aliases. */ |
61 |
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#define m68040up (m68040 | m68060) |
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#define m68030up (m68030 | m68040up) |
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#define m68020up (m68020 | m68030up) |
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#define m68010up (m68010 | cpu32 | m68020up) |
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#define m68000up (m68000 | m68010up) |
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#define mfloat (m68881 | m68882 | m68040 | m68060) |
#define mfloat (m68881 | m68882 | m68040 | m68060) |
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#define mmmu (m68851 | m68030 | m68040 | m68060) |
#define mmmu (m68851 | m68030 | m68040 | m68060) |
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{ |
{ |
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/* The opcode name. */ |
/* The opcode name. */ |
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const char *name; |
const char *name; |
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|
/* The pseudo-size of the instruction(in bytes). Used to determine |
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number of bytes necessary to disassemble the instruction. */ |
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unsigned int size; |
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/* The opcode itself. */ |
/* The opcode itself. */ |
80 |
unsigned long opcode; |
unsigned long opcode; |
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/* The mask used by the disassembler. */ |
/* The mask used by the disassembler. */ |
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operand; the second, the place it is stored. */ |
operand; the second, the place it is stored. */ |
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|
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/* Kinds of operands: |
/* Kinds of operands: |
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Characters used: AaBCcDdEFfGHIJkLlMmnOopQqRrSsTtU VvWXYZ0123|*~%;@!&$?/<>#^+- |
Characters used: AaBbCcDdEeFfGgHIiJkLlMmnOopQqRrSsTtU VvWwXxYyZz01234|*~%;@!&$?/<>#^+- |
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D data register only. Stored as 3 bits. |
D data register only. Stored as 3 bits. |
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A address register only. Stored as 3 bits. |
A address register only. Stored as 3 bits. |
144 |
C the CCR. No need to store it; this is just for filtering validity. |
C the CCR. No need to store it; this is just for filtering validity. |
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S the SR. No need to store, just as with CCR. |
S the SR. No need to store, just as with CCR. |
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U the USP. No need to store, just as with CCR. |
U the USP. No need to store, just as with CCR. |
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E the ACC. No need to store, just as with CCR. |
E the MAC ACC. No need to store, just as with CCR. |
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G the MACSR. No need to store, just as with CCR. |
e the EMAC ACC[0123]. |
149 |
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G the MAC/EMAC MACSR. No need to store, just as with CCR. |
150 |
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g the EMAC ACCEXT{01,23}. |
151 |
H the MASK. No need to store, just as with CCR. |
H the MASK. No need to store, just as with CCR. |
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i the MAC/EMAC scale factor. |
153 |
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I Coprocessor ID. Not printed if 1. The Coprocessor ID is always |
I Coprocessor ID. Not printed if 1. The Coprocessor ID is always |
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extracted from the 'd' field of word one, which means that an extended |
extracted from the 'd' field of word one, which means that an extended |
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Possible values: |
Possible values: |
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0x000 SFC Source Function Code reg [60, 40, 30, 20, 10] |
0x000 SFC Source Function Code reg [60, 40, 30, 20, 10] |
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0x001 DFC Data Function Code reg [60, 40, 30, 20, 10] |
0x001 DFC Data Function Code reg [60, 40, 30, 20, 10] |
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0x002 CACR Cache Control Register [60, 40, 30, 20] |
0x002 CACR Cache Control Register [60, 40, 30, 20, mcf] |
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0x003 TC MMU Translation Control [60, 40] |
0x003 TC MMU Translation Control [60, 40] |
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0x004 ITT0 Instruction Transparent |
0x004 ITT0 Instruction Transparent |
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Translation reg 0 [60, 40] |
Translation reg 0 [60, 40] |
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Translation reg 1 [60, 40] |
Translation reg 1 [60, 40] |
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0x008 BUSCR Bus Control Register [60] |
0x008 BUSCR Bus Control Register [60] |
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0x800 USP User Stack Pointer [60, 40, 30, 20, 10] |
0x800 USP User Stack Pointer [60, 40, 30, 20, 10] |
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0x801 VBR Vector Base reg [60, 40, 30, 20, 10] |
0x801 VBR Vector Base reg [60, 40, 30, 20, 10, mcf] |
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0x802 CAAR Cache Address Register [ 30, 20] |
0x802 CAAR Cache Address Register [ 30, 20] |
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0x803 MSP Master Stack Pointer [ 40, 30, 20] |
0x803 MSP Master Stack Pointer [ 40, 30, 20] |
179 |
0x804 ISP Interrupt Stack Pointer [ 40, 30, 20] |
0x804 ISP Interrupt Stack Pointer [ 40, 30, 20] |
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0xC04 RAMBAR0 RAM Base Address Register 0 [520X] |
0xC04 RAMBAR0 RAM Base Address Register 0 [520X] |
186 |
0xC05 RAMBAR1 RAM Base Address Register 0 [520X] |
0xC05 RAMBAR1 RAM Base Address Register 0 [520X] |
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0xC0F MBAR0 RAM Base Address Register 0 [520X] |
0xC0F MBAR0 RAM Base Address Register 0 [520X] |
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0xC04 FLASHBAR FLASH Base Address Register [mcf528x] |
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0xC05 RAMBAR Static RAM Base Address Register [mcf528x] |
190 |
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L Register list of the type d0-d7/a0-a7 etc. |
L Register list of the type d0-d7/a0-a7 etc. |
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(New! Improved! Can also hold fp0-fp7, as well!) |
(New! Improved! Can also hold fp0-fp7, as well!) |
219 |
! control (modes 2,5,6,7.0-3) |
! control (modes 2,5,6,7.0-3) |
220 |
(not 0,1,3,4,7.4) |
(not 0,1,3,4,7.4) |
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& alterable control (modes 2,5,6,7.0,7.1) |
& alterable control (modes 2,5,6,7.0,7.1) |
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(not 0,1,7.2-4) |
(not 0,1,3,4,7.2-4) |
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$ alterable data (modes 0,2-6,7.0,7.1) |
$ alterable data (modes 0,2-6,7.0,7.1) |
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(not 1,7.2-4) |
(not 1,7.2-4) |
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? alterable control, or data register (modes 0,2,5,6,7.0,7.1) |
? alterable control, or data register (modes 0,2,5,6,7.0,7.1) |
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coldfire bset/bclr/btst/mulsl/mulul operands: |
coldfire bset/bclr/btst/mulsl/mulul operands: |
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q (modes 0,2-5) |
q (modes 0,2-5) |
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v (modes 0,2-5,7.0,7.1) |
v (modes 0,2-5,7.0,7.1) |
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*/ |
b (modes 0,2-5,7.2) |
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|
w (modes 2-5,7.2) |
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y (modes 2,5) |
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z (modes 2,5,7.2) |
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x mov3q immediate operand. |
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4 (modes 2,3,4,5) |
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*/ |
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/* For the 68851: */ |
/* For the 68851: */ |
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/* |
/* I didn't use much imagination in choosing the |
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I didn't use much imagination in choosing the |
|
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following codes, so many of them aren't very |
following codes, so many of them aren't very |
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mnemonic. -rab |
mnemonic. -rab |
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|
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*/ |
*/ |
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/* Places to put an operand, for non-general operands: |
/* Places to put an operand, for non-general operands: |
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Characters used: BbCcDdghijkLlMmNnostWw123456789 |
Characters used: BbCcDdFfGgHhIijkLlMmNnostWw123456789/ |
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|
|
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s source, low bits of first word. |
s source, low bits of first word. |
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d dest, shifted 9 in first word |
d dest, shifted 9 in first word |
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F double precision float, low bit of 1st word, immediate uses 8 bytes |
F double precision float, low bit of 1st word, immediate uses 8 bytes |
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x extended precision float, low bit of 1st word, immediate uses 12 bytes |
x extended precision float, low bit of 1st word, immediate uses 12 bytes |
366 |
p packed float, low bit of 1st word, immediate uses 12 bytes |
p packed float, low bit of 1st word, immediate uses 12 bytes |
367 |
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G EMAC accumulator, load (bit 4 2nd word, !bit8 first word) |
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H EMAC accumulator, non load (bit 4 2nd word, bit 8 first word) |
369 |
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F EMAC ACCx |
370 |
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f EMAC ACCy |
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I MAC/EMAC scale factor |
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/ Like 's', but set 2nd word, bit 5 if trailing_ampersand set |
373 |
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] first word, bit 10 |
374 |
*/ |
*/ |
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extern const struct m68k_opcode m68k_opcodes[]; |
extern const struct m68k_opcode m68k_opcodes[]; |