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/* m68hc11.h -- Header file for Motorola 68HC11 & 68HC12 opcode table |
/* m68hc11.h -- Header file for Motorola 68HC11 & 68HC12 opcode table |
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Copyright 1999, 2000 Free Software Foundation, Inc. |
Copyright 1999, 2000, 2002, 2003 Free Software Foundation, Inc. |
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Written by Stephane Carrez (stcarrez@worldnet.fr) |
Written by Stephane Carrez (stcarrez@nerim.fr) |
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This file is part of GDB, GAS, and the GNU binutils. |
This file is part of GDB, GAS, and the GNU binutils. |
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/* Flags of the SPSR register. */ |
/* Flags of the SPSR register. */ |
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#define M6811_SPIF 0x80 /* SPI Transfer Complete flag */ |
#define M6811_SPIF 0x80 /* SPI Transfer Complete flag */ |
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#define M6811_WCOL 0x40 /* Write Collision */ |
#define M6811_WCOL 0x40 /* Write Collision */ |
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#define M6811_MODF 0x20 /* Mode Fault */ |
#define M6811_MODF 0x10 /* Mode Fault */ |
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/* Flags of the ADCTL register. */ |
/* Flags of the ADCTL register. */ |
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#define M6811_CCF 0x80 /* Conversions Complete Flag */ |
#define M6811_CCF 0x80 /* Conversions Complete Flag */ |
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/* Flags of the OC1M register. */ |
/* Flags of the OC1M register. */ |
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#define M6811_OC1M7 0x80 /* Output Compare 7 */ |
#define M6811_OC1M7 0x80 /* Output Compare 7 */ |
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#define M6811_OC1M6 0x40 /* 6 */ |
#define M6811_OC1M6 0x40 /* 6 */ |
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#define M6811_OC1M5 0x40 /* 5 */ |
#define M6811_OC1M5 0x20 /* 5 */ |
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#define M6811_OC1M4 0x40 /* 4 */ |
#define M6811_OC1M4 0x10 /* 4 */ |
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#define M6811_OC1M3 0x08 /* 3 */ |
#define M6811_OC1M3 0x08 /* 3 */ |
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/* Flags of the OC1D register. */ |
/* Flags of the OC1D register. */ |
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#define M6812_OP_IDX_2 0x0800 /* N,r N:16-bits */ |
#define M6812_OP_IDX_2 0x0800 /* N,r N:16-bits */ |
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#define M6812_OP_D_IDX 0x1000 /* Indirect indexed: [D,r] */ |
#define M6812_OP_D_IDX 0x1000 /* Indirect indexed: [D,r] */ |
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#define M6812_OP_D_IDX_2 0x2000 /* [N,r] N:16-bits */ |
#define M6812_OP_D_IDX_2 0x2000 /* [N,r] N:16-bits */ |
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#define M6811_OP_MASK 0x0FFFF |
#define M6812_OP_PAGE 0x4000 /* Page number */ |
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#define M6811_OP_MASK 0x07FFF |
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#define M6811_OP_BRANCH 0x00008000 /* Branch, jsr, call */ |
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#define M6811_OP_BITMASK 0x00010000 /* Bitmask: #<val-8> */ |
#define M6811_OP_BITMASK 0x00010000 /* Bitmask: #<val-8> */ |
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#define M6811_OP_JUMP_REL 0x00020000 /* Pc-Relative: <val-8> */ |
#define M6811_OP_JUMP_REL 0x00020000 /* Pc-Relative: <val-8> */ |
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#define M6812_OP_JUMP_REL16 0x00040000 /* Pc-relative: <val-16> */ |
#define M6812_OP_JUMP_REL16 0x00040000 /* Pc-relative: <val-16> */ |
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#define M6811_OP_HIGH_ADDR 0x01000000 /* Used internally by gas. */ |
#define M6811_OP_HIGH_ADDR 0x01000000 /* Used internally by gas. */ |
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#define M6811_OP_LOW_ADDR 0x02000000 |
#define M6811_OP_LOW_ADDR 0x02000000 |
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#define M68HC12_BANK_VIRT 0x010000 |
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#define M68HC12_BANK_MASK 0x00003fff |
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#define M68HC12_BANK_BASE 0x00008000 |
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#define M68HC12_BANK_SHIFT 14 |
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#define M68HC12_BANK_PAGE_MASK 0x0ff |
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/* CPU identification. */ |
/* CPU identification. */ |
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#define cpu6811 0x01 |
#define cpu6811 0x01 |
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#define cpu6812 0x02 |
#define cpu6812 0x02 |
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#define cpu6812s 0x04 |
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/* The opcode table is an array of struct m68hc11_opcode. */ |
/* The opcode table is an array of struct m68hc11_opcode. */ |
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struct m68hc11_opcode { |
struct m68hc11_opcode { |
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extern const int m68hc12_num_alias; |
extern const int m68hc12_num_alias; |
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#endif /* _OPCODE_M68HC11_H */ |
#endif /* _OPCODE_M68HC11_H */ |
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