619 |
|
|
620 |
/* Interrupt vectors */ |
/* Interrupt vectors */ |
621 |
|
|
622 |
#define SIG_INTERRUPT0 _VECTOR(1) |
/* External Interrupt Request 0 */ |
623 |
#define SIG_INTERRUPT1 _VECTOR(2) |
#define INT0_vect _VECTOR(1) |
624 |
#define SIG_PIN_CHANGE0 _VECTOR(3) |
#define SIG_INTERRUPT0 _VECTOR(1) |
625 |
#define SIG_PIN_CHANGE1 _VECTOR(4) |
|
626 |
#define SIG_PIN_CHANGE2 _VECTOR(5) |
/* External Interrupt Request 1 */ |
627 |
#define SIG_WATCHDOG_TIMEOUT _VECTOR(6) |
#define INT1_vect _VECTOR(2) |
628 |
#define SIG_OUTPUT_COMPARE2A _VECTOR(7) |
#define SIG_INTERRUPT1 _VECTOR(2) |
629 |
#define SIG_OUTPUT_COMPARE2B _VECTOR(8) |
|
630 |
#define SIG_OVERFLOW2 _VECTOR(9) |
/* Pin Change Interrupt Request 0 */ |
631 |
#define SIG_INPUT_CAPTURE1 _VECTOR(10) |
#define PCINT0_vect _VECTOR(3) |
632 |
#define SIG_OUTPUT_COMPARE1A _VECTOR(11) |
#define SIG_PIN_CHANGE0 _VECTOR(3) |
633 |
#define SIG_OUTPUT_COMPARE1B _VECTOR(12) |
|
634 |
#define SIG_OVERFLOW1 _VECTOR(13) |
/* Pin Change Interrupt Request 0 */ |
635 |
#define SIG_OUTPUT_COMPARE0A _VECTOR(14) |
#define PCINT1_vect _VECTOR(4) |
636 |
#define SIG_OUTPUT_COMPARE0B _VECTOR(15) |
#define SIG_PIN_CHANGE1 _VECTOR(4) |
637 |
#define SIG_OVERFLOW0 _VECTOR(16) |
|
638 |
#define SIG_SPI _VECTOR(17) |
/* Pin Change Interrupt Request 1 */ |
639 |
#define SIG_USART_RECV _VECTOR(18) |
#define PCINT2_vect _VECTOR(5) |
640 |
#define SIG_USART_DATA _VECTOR(19) |
#define SIG_PIN_CHANGE2 _VECTOR(5) |
641 |
#define SIG_USART_TRANS _VECTOR(20) |
|
642 |
#define SIG_ADC _VECTOR(21) |
/* Watchdog Time-out Interrupt */ |
643 |
#define SIG_EEPROM_READY _VECTOR(22) |
#define WDT_vect _VECTOR(6) |
644 |
#define SIG_COMPARATOR _VECTOR(23) |
#define SIG_WATCHDOG_TIMEOUT _VECTOR(6) |
645 |
#define SIG_TWI _VECTOR(24) |
|
646 |
#define SIG_SPM_READY _VECTOR(25) |
/* Timer/Counter2 Compare Match A */ |
647 |
|
#define TIMER2_COMPA_vect _VECTOR(7) |
648 |
|
#define SIG_OUTPUT_COMPARE2A _VECTOR(7) |
649 |
|
|
650 |
|
/* Timer/Counter2 Compare Match A */ |
651 |
|
#define TIMER2_COMPB_vect _VECTOR(8) |
652 |
|
#define SIG_OUTPUT_COMPARE2B _VECTOR(8) |
653 |
|
|
654 |
|
/* Timer/Counter2 Overflow */ |
655 |
|
#define TIMER2_OVF_vect _VECTOR(9) |
656 |
|
#define SIG_OVERFLOW2 _VECTOR(9) |
657 |
|
|
658 |
|
/* Timer/Counter1 Capture Event */ |
659 |
|
#define TIMER1_CAPT_vect _VECTOR(10) |
660 |
|
#define SIG_INPUT_CAPTURE1 _VECTOR(10) |
661 |
|
|
662 |
|
/* Timer/Counter1 Compare Match A */ |
663 |
|
#define TIMER1_COMPA_vect _VECTOR(11) |
664 |
|
#define SIG_OUTPUT_COMPARE1A _VECTOR(11) |
665 |
|
|
666 |
|
/* Timer/Counter1 Compare Match B */ |
667 |
|
#define TIMER1_COMPB_vect _VECTOR(12) |
668 |
|
#define SIG_OUTPUT_COMPARE1B _VECTOR(12) |
669 |
|
|
670 |
|
/* Timer/Counter1 Overflow */ |
671 |
|
#define TIMER1_OVF_vect _VECTOR(13) |
672 |
|
#define SIG_OVERFLOW1 _VECTOR(13) |
673 |
|
|
674 |
|
/* TimerCounter0 Compare Match A */ |
675 |
|
#define TIMER0_COMPA_vect _VECTOR(14) |
676 |
|
#define SIG_OUTPUT_COMPARE0A _VECTOR(14) |
677 |
|
|
678 |
|
/* TimerCounter0 Compare Match B */ |
679 |
|
#define TIMER0_COMPB_vect _VECTOR(15) |
680 |
|
#define SIG_OUTPUT_COMPARE0B _VECTOR(15) |
681 |
|
|
682 |
|
/* Timer/Couner0 Overflow */ |
683 |
|
#define TIMER0_OVF_vect _VECTOR(16) |
684 |
|
#define SIG_OVERFLOW0 _VECTOR(16) |
685 |
|
|
686 |
|
/* SPI Serial Transfer Complete */ |
687 |
|
#define SPI_STC_vect _VECTOR(17) |
688 |
|
#define SIG_SPI _VECTOR(17) |
689 |
|
|
690 |
|
/* USART Rx Complete */ |
691 |
|
#define USART_RX_vect _VECTOR(18) |
692 |
|
#define SIG_USART_RECV _VECTOR(18) |
693 |
|
|
694 |
|
/* USART, Data Register Empty */ |
695 |
|
#define USART_UDRE_vect _VECTOR(19) |
696 |
|
#define SIG_USART_DATA _VECTOR(19) |
697 |
|
|
698 |
|
/* USART Tx Complete */ |
699 |
|
#define USART_TX_vect _VECTOR(20) |
700 |
|
#define SIG_USART_TRANS _VECTOR(20) |
701 |
|
|
702 |
|
/* ADC Conversion Complete */ |
703 |
|
#define ADC_vect _VECTOR(21) |
704 |
|
#define SIG_ADC _VECTOR(21) |
705 |
|
|
706 |
|
/* EEPROM Ready */ |
707 |
|
#define EE_READY_vect _VECTOR(22) |
708 |
|
#define SIG_EEPROM_READY _VECTOR(22) |
709 |
|
|
710 |
|
/* Analog Comparator */ |
711 |
|
#define ANALOG_COMP_vect _VECTOR(23) |
712 |
|
#define SIG_COMPARATOR _VECTOR(23) |
713 |
|
|
714 |
|
/* Two-wire Serial Interface */ |
715 |
|
#define TWI_vect _VECTOR(24) |
716 |
|
#define SIG_TWI _VECTOR(24) |
717 |
|
|
718 |
|
/* Store Program Memory Read */ |
719 |
|
#define SPM_READY_vect _VECTOR(25) |
720 |
|
#define SIG_SPM_READY _VECTOR(25) |
721 |
|
|
722 |
|
|
723 |
/* The mega48 and mega88 vector tables are single instruction entries (16 bits |
/* The mega48 and mega88 vector tables are single instruction entries (16 bits |
724 |
per entry for an RJMP) while the mega168 table has double instruction |
per entry for an RJMP) while the mega168 table has double instruction |