497 |
|
|
498 |
/* Interrupt vectors */ |
/* Interrupt vectors */ |
499 |
/* Vector 0 is the reset vector */ |
/* Vector 0 is the reset vector */ |
500 |
#define SIG_INTERRUPT0 _VECTOR(1) |
/* External Interrupt Request 0 */ |
501 |
#define SIG_PIN_CHANGE0 _VECTOR(2) |
#define INT0_vect _VECTOR(1) |
502 |
#define SIG_PIN_CHANGE1 _VECTOR(3) |
#define SIG_INTERRUPT0 _VECTOR(1) |
503 |
#define SIG_OUTPUT_COMPARE2 _VECTOR(4) |
|
504 |
#define SIG_OVERFLOW2 _VECTOR(5) |
/* Pin Change Interrupt Request 0 */ |
505 |
#define SIG_INPUT_CAPTURE1 _VECTOR(6) |
#define PCINT0_vect _VECTOR(2) |
506 |
#define SIG_OUTPUT_COMPARE1A _VECTOR(7) |
#define SIG_PIN_CHANGE0 _VECTOR(2) |
507 |
#define SIG_OUTPUT_COMPARE1B _VECTOR(8) |
|
508 |
#define SIG_OVERFLOW1 _VECTOR(9) |
/* Pin Change Interrupt Request 1 */ |
509 |
#define SIG_OUTPUT_COMPARE0 _VECTOR(10) |
#define PCINT1_vect _VECTOR(3) |
510 |
#define SIG_OVERFLOW0 _VECTOR(11) |
#define SIG_PIN_CHANGE1 _VECTOR(3) |
511 |
#define SIG_SPI _VECTOR(12) |
|
512 |
#define SIG_UART_RECV _VECTOR(13) |
/* Timer/Counter2 Compare Match */ |
513 |
#define SIG_UART_DATA _VECTOR(14) |
#define TIMER2_COMP_vect _VECTOR(4) |
514 |
#define SIG_UART_TRANS _VECTOR(15) |
#define SIG_OUTPUT_COMPARE2 _VECTOR(4) |
515 |
#define SIG_USI_START _VECTOR(16) |
|
516 |
#define SIG_USI_OVERFLOW _VECTOR(17) |
/* Timer/Counter2 Overflow */ |
517 |
#define SIG_COMPARATOR _VECTOR(18) |
#define TIMER2_OVF_vect _VECTOR(5) |
518 |
#define SIG_ADC _VECTOR(19) |
#define SIG_OVERFLOW2 _VECTOR(5) |
519 |
#define SIG_EEPROM_READY _VECTOR(20) |
|
520 |
|
/* Timer/Counter1 Capture Event */ |
521 |
|
#define TIMER1_CAPT_vect _VECTOR(6) |
522 |
|
#define SIG_INPUT_CAPTURE1 _VECTOR(6) |
523 |
|
|
524 |
|
/* Timer/Counter1 Compare Match A */ |
525 |
|
#define TIMER1_COMPA_vect _VECTOR(7) |
526 |
|
#define SIG_OUTPUT_COMPARE1A _VECTOR(7) |
527 |
|
|
528 |
|
/* Timer/Counter Compare Match B */ |
529 |
|
#define TIMER1_COMPB_vect _VECTOR(8) |
530 |
|
#define SIG_OUTPUT_COMPARE1B _VECTOR(8) |
531 |
|
|
532 |
|
/* Timer/Counter1 Overflow */ |
533 |
|
#define TIMER1_OVF_vect _VECTOR(9) |
534 |
|
#define SIG_OVERFLOW1 _VECTOR(9) |
535 |
|
|
536 |
|
/* Timer/Counter0 Compare Match */ |
537 |
|
#define TIMER0_COMP_vect _VECTOR(10) |
538 |
|
#define SIG_OUTPUT_COMPARE0 _VECTOR(10) |
539 |
|
|
540 |
|
/* Timer/Counter0 Overflow */ |
541 |
|
#define TIMER0_OVF_vect _VECTOR(11) |
542 |
|
#define SIG_OVERFLOW0 _VECTOR(11) |
543 |
|
|
544 |
|
/* SPI Serial Transfer Complete */ |
545 |
|
#define SPI_STC_vect _VECTOR(12) |
546 |
|
#define SIG_SPI _VECTOR(12) |
547 |
|
|
548 |
|
/* USART0, Rx Complete */ |
549 |
|
#define USART0_RX_vect _VECTOR(13) |
550 |
|
#define SIG_UART_RECV _VECTOR(13) |
551 |
|
|
552 |
|
/* USART0 Data register Empty */ |
553 |
|
#define USART0_UDRE_vect _VECTOR(14) |
554 |
|
#define SIG_UART_DATA _VECTOR(14) |
555 |
|
|
556 |
|
/* USART0, Tx Complete */ |
557 |
|
#define USART0_TX_vect _VECTOR(15) |
558 |
|
#define SIG_UART_TRANS _VECTOR(15) |
559 |
|
|
560 |
|
/* USI Start Condition */ |
561 |
|
#define USI_START_vect _VECTOR(16) |
562 |
|
#define SIG_USI_START _VECTOR(16) |
563 |
|
|
564 |
|
/* USI Overflow */ |
565 |
|
#define USI_OVERFLOW_vect _VECTOR(17) |
566 |
|
#define SIG_USI_OVERFLOW _VECTOR(17) |
567 |
|
|
568 |
|
/* Analog Comparator */ |
569 |
|
#define ANALOG_COMP_vect _VECTOR(18) |
570 |
|
#define SIG_COMPARATOR _VECTOR(18) |
571 |
|
|
572 |
|
/* ADC Conversion Complete */ |
573 |
|
#define ADC_vect _VECTOR(19) |
574 |
|
#define SIG_ADC _VECTOR(19) |
575 |
|
|
576 |
|
/* EEPROM Ready */ |
577 |
|
#define EE_READY_vect _VECTOR(20) |
578 |
|
#define SIG_EEPROM_READY _VECTOR(20) |
579 |
|
|
580 |
|
/* Store Program Memory Read */ |
581 |
|
#define SPM_READY_vect _VECTOR(21) |
582 |
|
#define SIG_SPM_READY _VECTOR(21) |
583 |
|
|
584 |
#define SIG_SPM_READY _VECTOR(21) |
#define SIG_SPM_READY _VECTOR(21) |
585 |
/* Vector 22 is Reserved */ |
/* Vector 22 is Reserved */ |
586 |
|
|