153 |
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154 |
/* Reserved [0x28..0x29] */ |
/* Reserved [0x28..0x29] */ |
155 |
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156 |
#define GPIOR1 SFR_IO8(0x2A) |
#define GPIOR1 _SFR_IO8(0x2A) |
157 |
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158 |
#define GPIOR2 SFR_IO8(0x2B) |
#define GPIOR2 _SFR_IO8(0x2B) |
159 |
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160 |
#define SPCR SFR_IO8(0x2C) |
#define SPCR _SFR_IO8(0x2C) |
161 |
#define SPR0 0 |
#define SPR0 0 |
162 |
#define SPR1 1 |
#define SPR1 1 |
163 |
#define CPHA 2 |
#define CPHA 2 |
167 |
#define SPE 6 |
#define SPE 6 |
168 |
#define SPIE 7 |
#define SPIE 7 |
169 |
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170 |
#define SPSR SFR_IO8(0x2D) |
#define SPSR _SFR_IO8(0x2D) |
171 |
#define SPI2X 0 |
#define SPI2X 0 |
172 |
#define WCOL 6 |
#define WCOL 6 |
173 |
#define SPIF 7 |
#define SPIF 7 |
174 |
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175 |
#define SPDR SFR_IO8(0X2E) |
#define SPDR _SFR_IO8(0X2E) |
176 |
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177 |
/* Reserved [0x2F] */ |
/* Reserved [0x2F] */ |
178 |
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179 |
#define ACSR SFR_IO8(0x30) |
#define ACSR _SFR_IO8(0x30) |
180 |
#define ACIS0 0 |
#define ACIS0 0 |
181 |
#define ACIS1 1 |
#define ACIS1 1 |
182 |
#define ACIC 2 |
#define ACIC 2 |
186 |
#define ACBG 6 |
#define ACBG 6 |
187 |
#define ACD 7 |
#define ACD 7 |
188 |
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189 |
#define OCDR SFR_IO8(0x31) |
#define OCDR _SFR_IO8(0x31) |
190 |
#define OCDR0 0 |
#define OCDR0 0 |
191 |
#define OCDR1 1 |
#define OCDR1 1 |
192 |
#define OCDR2 2 |
#define OCDR2 2 |