154 |
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155 |
/* Reserved [0x28..0x29] */ |
/* Reserved [0x28..0x29] */ |
156 |
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157 |
#define GPIOR1 SFR_IO8(0x2A) |
#define GPIOR1 _SFR_IO8(0x2A) |
158 |
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159 |
#define GPIOR2 SFR_IO8(0x2B) |
#define GPIOR2 _SFR_IO8(0x2B) |
160 |
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161 |
#define SPCR SFR_IO8(0x2C) |
#define SPCR _SFR_IO8(0x2C) |
162 |
#define SPR0 0 |
#define SPR0 0 |
163 |
#define SPR1 1 |
#define SPR1 1 |
164 |
#define CPHA 2 |
#define CPHA 2 |
168 |
#define SPE 6 |
#define SPE 6 |
169 |
#define SPIE 7 |
#define SPIE 7 |
170 |
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171 |
#define SPSR SFR_IO8(0x2D) |
#define SPSR _SFR_IO8(0x2D) |
172 |
#define SPI2X 0 |
#define SPI2X 0 |
173 |
#define WCOL 6 |
#define WCOL 6 |
174 |
#define SPIF 7 |
#define SPIF 7 |
175 |
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176 |
#define SPDR SFR_IO8(0X2E) |
#define SPDR _SFR_IO8(0X2E) |
177 |
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178 |
/* Reserved [0x2F] */ |
/* Reserved [0x2F] */ |
179 |
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180 |
#define ACSR SFR_IO8(0x30) |
#define ACSR _SFR_IO8(0x30) |
181 |
#define ACIS0 0 |
#define ACIS0 0 |
182 |
#define ACIS1 1 |
#define ACIS1 1 |
183 |
#define ACIC 2 |
#define ACIC 2 |
187 |
#define ACBG 6 |
#define ACBG 6 |
188 |
#define ACD 7 |
#define ACD 7 |
189 |
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190 |
#define OCDR SFR_IO8(0x31) |
#define OCDR _SFR_IO8(0x31) |
191 |
#define OCDR0 0 |
#define OCDR0 0 |
192 |
#define OCDR1 1 |
#define OCDR1 1 |
193 |
#define OCDR2 2 |
#define OCDR2 2 |