1176 |
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1177 |
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|
1178 |
/* Interrupt vectors */ |
/* Interrupt vectors */ |
1179 |
#define SIG_PSC2_CAPTURE _VECTOR(1) /* PSC2 Capture Event */ |
/* PSC2 Capture Event */ |
1180 |
#define SIG_PSC2_END_CYCLE _VECTOR(2) /* PSC2 End Cycle */ |
#define PSC2_CAPT_vect _VECTOR(1) |
1181 |
#define SIG_PSC1_CAPTURE _VECTOR(3) /* PSC1 Capture Event */ |
#define SIG_PSC2_CAPTURE _VECTOR(1) |
1182 |
#define SIG_PSC1_END_CYCLE _VECTOR(4) /* PSC1 End Cycle */ |
|
1183 |
#define SIG_PSC0_CAPTURE _VECTOR(5) /* PSC0 Capture Event */ |
/* PSC2 End Cycle */ |
1184 |
#define SIG_PSC0_END_CYCLE _VECTOR(6) /* PSC0 End Cycle */ |
#define PSC2_EC_vect _VECTOR(2) |
1185 |
#define SIG_COMPARATOR0 _VECTOR(7) /* Analog Comparator 0 */ |
#define SIG_PSC2_END_CYCLE _VECTOR(2) |
1186 |
#define SIG_COMPARATOR1 _VECTOR(8) /* Analog Comparator 1 */ |
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1187 |
#define SIG_COMPARATOR2 _VECTOR(9) /* Analog Comparator 2 */ |
/* PSC1 Capture Event */ |
1188 |
#define SIG_INTERRUPT0 _VECTOR(10) /* External Interrupt Request 0 */ |
#define PSC1_CAPT_vect _VECTOR(3) |
1189 |
#define SIG_INPUT_CAPTURE1 _VECTOR(11) /* Timer/Counter1 Capture Event */ |
#define SIG_PSC1_CAPTURE _VECTOR(3) |
1190 |
#define SIG_OUTPUT_COMPARE1_A _VECTOR(12) /* Timer/Counter1 Compare Match A */ |
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1191 |
#define SIG_OUTPUT_COMPARE1_B _VECTOR(13) /* Timer/Counter1 Compare Match B */ |
/* PSC1 End Cycle */ |
1192 |
#define SIG_OVERFLOW1 _VECTOR(15) /* Timer/Counter1 Overflow */ |
#define PSC1_EC_vect _VECTOR(4) |
1193 |
#define SIG_OUTPUT_COMPARE0_A _VECTOR(16) /* Timer/Counter0 Compare Match A */ |
#define SIG_PSC1_END_CYCLE _VECTOR(4) |
1194 |
#define SIG_OVERFLOW0 _VECTOR(17) /* Timer/Counter0 Overflow */ |
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1195 |
#define SIG_ADC _VECTOR(18) /* ADC Conversion Complete */ |
/* PSC0 Capture Event */ |
1196 |
#define SIG_INTERRUPT1 _VECTOR(19) /* External Interrupt Request 1 */ |
#define PSC0_CAPT_vect _VECTOR(5) |
1197 |
#define SIG_SPI _VECTOR(20) /* SPI Serial Transfer Complete */ |
#define SIG_PSC0_CAPTURE _VECTOR(5) |
1198 |
#define SIG_USART_RECV _VECTOR(21) /* USART Rx Complete */ |
|
1199 |
#define SIG_UART_RECV _VECTOR(21) /* For backwards compatibility */ |
/* PSC0 End Cycle */ |
1200 |
#define SIG_USART_DATA _VECTOR(22) /* USART Data Register Empty */ |
#define PSC0_EC_vect _VECTOR(6) |
1201 |
#define SIG_UART_DATA _VECTOR(22) /* For backwards compatibility */ |
#define SIG_PSC0_END_CYCLE _VECTOR(6) |
1202 |
#define SIG_USART_TRANS _VECTOR(23) /* USART Tx Complete */ |
|
1203 |
#define SIG_UART_TRANS _VECTOR(23) /* For backwards compatibility */ |
/* Analog Comparator 0 */ |
1204 |
#define SIG_INTERRUPT2 _VECTOR(24) /* External Interrupt Request 2 */ |
#define ANALOG_COMP_0_vect _VECTOR(7) |
1205 |
#define SIG_WDT _VECTOR(25) /* Watchdog Time-Out Interrupt */ |
#define SIG_COMPARATOR0 _VECTOR(7) |
1206 |
#define SIG_EEPROM_READY _VECTOR(26) /* EEPROM Ready */ |
|
1207 |
#define SIG_OUTPUT_COMPARE0_B _VECTOR(27) /* Timer/Counter0 Compare Match B */ |
/* Analog Comparator 1 */ |
1208 |
#define SIG_INTERRUPT3 _VECTOR(28) /* External Interrupt Request 3 */ |
#define ANALOG_COMP_1_vect _VECTOR(8) |
1209 |
#define SIG_SPM_READY _VECTOR(31) /* Store Program Memory Ready */ |
#define SIG_COMPARATOR1 _VECTOR(8) |
1210 |
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1211 |
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/* Analog Comparator 2 */ |
1212 |
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#define ANALOG_COMP_2_vect _VECTOR(9) |
1213 |
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#define SIG_COMPARATOR2 _VECTOR(9) |
1214 |
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1215 |
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/* External Interrupt Request 0 */ |
1216 |
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#define INT0_vect _VECTOR(10) |
1217 |
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#define SIG_INTERRUPT0 _VECTOR(10) |
1218 |
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1219 |
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/* Timer/Counter1 Capture Event */ |
1220 |
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#define TIMER1_CAPT_vect _VECTOR(11) |
1221 |
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#define SIG_INPUT_CAPTURE1 _VECTOR(11) |
1222 |
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1223 |
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/* Timer/Counter1 Compare Match A */ |
1224 |
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#define TIMER1_COMPA_vect _VECTOR(12) |
1225 |
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#define SIG_OUTPUT_COMPARE1_A _VECTOR(12) |
1226 |
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1227 |
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/* Timer/Counter Compare Match B */ |
1228 |
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#define TIMER1_COMPB_vect _VECTOR(13) |
1229 |
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#define SIG_OUTPUT_COMPARE1_B _VECTOR(13) |
1230 |
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1231 |
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/* Timer/Counter1 Overflow */ |
1232 |
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#define TIMER1_OVF_vect _VECTOR(15) |
1233 |
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#define SIG_OVERFLOW1 _VECTOR(15) |
1234 |
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1235 |
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/* Timer/Counter0 Compare Match A */ |
1236 |
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#define TIMER0_COMP_A_vect _VECTOR(16) |
1237 |
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#define SIG_OUTPUT_COMPARE0_A _VECTOR(16) |
1238 |
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1239 |
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/* Timer/Counter0 Overflow */ |
1240 |
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#define TIMER0_OVF_vect _VECTOR(17) |
1241 |
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#define SIG_OVERFLOW0 _VECTOR(17) |
1242 |
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1243 |
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/* ADC Conversion Complete */ |
1244 |
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#define ADC_vect _VECTOR(18) |
1245 |
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#define SIG_ADC _VECTOR(18) |
1246 |
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1247 |
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/* External Interrupt Request 1 */ |
1248 |
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#define INT1_vect _VECTOR(19) |
1249 |
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#define SIG_INTERRUPT1 _VECTOR(19) |
1250 |
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1251 |
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/* SPI Serial Transfer Complete */ |
1252 |
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#define SPI_STC_vect _VECTOR(20) |
1253 |
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#define SIG_SPI _VECTOR(20) |
1254 |
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1255 |
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/* USART, Rx Complete */ |
1256 |
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#define USART_RX_vect _VECTOR(21) |
1257 |
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#define SIG_USART_RECV _VECTOR(21) |
1258 |
|
#define SIG_UART_RECV _VECTOR(21) |
1259 |
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|
1260 |
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/* USART Data Register Empty */ |
1261 |
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#define USART_UDRE_vect _VECTOR(22) |
1262 |
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#define SIG_USART_DATA _VECTOR(22) |
1263 |
|
#define SIG_UART_DATA _VECTOR(22) |
1264 |
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|
1265 |
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/* USART, Tx Complete */ |
1266 |
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#define USART_TX_vect _VECTOR(23) |
1267 |
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#define SIG_USART_TRANS _VECTOR(23) |
1268 |
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#define SIG_UART_TRANS _VECTOR(23) |
1269 |
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|
1270 |
|
/* External Interrupt Request 2 */ |
1271 |
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#define INT2_vect _VECTOR(24) |
1272 |
|
#define SIG_INTERRUPT2 _VECTOR(24) |
1273 |
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1274 |
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/* Watchdog Timeout Interrupt */ |
1275 |
|
#define WDT_vect _VECTOR(25) |
1276 |
|
#define SIG_WDT _VECTOR(25) |
1277 |
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|
1278 |
|
/* EEPROM Ready */ |
1279 |
|
#define EE_READY_vect _VECTOR(26) |
1280 |
|
#define SIG_EEPROM_READY _VECTOR(26) |
1281 |
|
|
1282 |
|
/* Timer Counter 0 Compare Match B */ |
1283 |
|
#define TIMER0_COMPB_vect _VECTOR(27) |
1284 |
|
#define SIG_OUTPUT_COMPARE0_B _VECTOR(27) |
1285 |
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|
1286 |
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/* External Interrupt Request 3 */ |
1287 |
|
#define INT3_vect _VECTOR(28) |
1288 |
|
#define SIG_INTERRUPT3 _VECTOR(28) |
1289 |
|
|
1290 |
|
/* Store Program Memory Read */ |
1291 |
|
#define SPM_READY_vect _VECTOR(31) |
1292 |
|
#define SIG_SPM_READY _VECTOR(31) |
1293 |
|
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1294 |
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|
1295 |
#define _VECTORS_SIZE 64 |
#define _VECTORS_SIZE 64 |
1296 |
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