190 |
"sts %0, %1\n\t" \ |
"sts %0, %1\n\t" \ |
191 |
"spm\n\t" \ |
"spm\n\t" \ |
192 |
"clr r1\n\t" \ |
"clr r1\n\t" \ |
193 |
: "=m" (__SPM_REG) \ |
: \ |
194 |
: "r" ((uint8_t)__BOOT_PAGE_FILL), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
195 |
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \ |
196 |
"r" ((uint16_t)address), \ |
"r" ((uint16_t)address), \ |
197 |
"r" ((uint16_t)data) \ |
"r" ((uint16_t)data) \ |
198 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
210 |
".word 0xffff\n\t" \ |
".word 0xffff\n\t" \ |
211 |
"nop\n\t" \ |
"nop\n\t" \ |
212 |
"clr r1\n\t" \ |
"clr r1\n\t" \ |
213 |
: "=m" (__SPM_REG) \ |
: \ |
214 |
: "r" ((uint8_t)__BOOT_PAGE_FILL), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
215 |
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \ |
216 |
"r" ((uint16_t)address), \ |
"r" ((uint16_t)address), \ |
217 |
"r" ((uint16_t)data) \ |
"r" ((uint16_t)data) \ |
218 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
229 |
"sts %0, %2\n\t" \ |
"sts %0, %2\n\t" \ |
230 |
"spm\n\t" \ |
"spm\n\t" \ |
231 |
"clr r1\n\t" \ |
"clr r1\n\t" \ |
232 |
: "=m" (__SPM_REG), \ |
: \ |
233 |
"=m" (RAMPZ) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
234 |
: "r" ((uint8_t)__BOOT_PAGE_FILL), \ |
"i" (_SFR_MEM_ADDR(RAMPZ)), \ |
235 |
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \ |
236 |
"r" ((uint32_t)address), \ |
"r" ((uint32_t)address), \ |
237 |
"r" ((uint16_t)data) \ |
"r" ((uint16_t)data) \ |
238 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
246 |
"movw r30, %2\n\t" \ |
"movw r30, %2\n\t" \ |
247 |
"sts %0, %1\n\t" \ |
"sts %0, %1\n\t" \ |
248 |
"spm\n\t" \ |
"spm\n\t" \ |
249 |
: "=m" (__SPM_REG) \ |
: \ |
250 |
: "r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
251 |
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
252 |
"r" ((uint16_t)address) \ |
"r" ((uint16_t)address) \ |
253 |
: "r30", "r31" \ |
: "r30", "r31" \ |
254 |
); \ |
); \ |
263 |
"spm\n\t" \ |
"spm\n\t" \ |
264 |
".word 0xffff\n\t" \ |
".word 0xffff\n\t" \ |
265 |
"nop\n\t" \ |
"nop\n\t" \ |
266 |
: "=m" (__SPM_REG) \ |
: \ |
267 |
: "r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
268 |
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
269 |
"r" ((uint16_t)address) \ |
"r" ((uint16_t)address) \ |
270 |
: "r30", "r31" \ |
: "r30", "r31" \ |
271 |
); \ |
); \ |
279 |
"sts %1, %C3\n\t" \ |
"sts %1, %C3\n\t" \ |
280 |
"sts %0, %2\n\t" \ |
"sts %0, %2\n\t" \ |
281 |
"spm\n\t" \ |
"spm\n\t" \ |
282 |
: "=m" (__SPM_REG), \ |
: \ |
283 |
"=m" (RAMPZ) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
284 |
: "r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
"i" (_SFR_MEM_ADDR(RAMPZ)), \ |
285 |
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \ |
286 |
"r" ((uint32_t)address) \ |
"r" ((uint32_t)address) \ |
287 |
: "r30", "r31" \ |
: "r30", "r31" \ |
288 |
); \ |
); \ |
295 |
"movw r30, %2\n\t" \ |
"movw r30, %2\n\t" \ |
296 |
"sts %0, %1\n\t" \ |
"sts %0, %1\n\t" \ |
297 |
"spm\n\t" \ |
"spm\n\t" \ |
298 |
: "=m" (__SPM_REG) \ |
: \ |
299 |
: "r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
300 |
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
301 |
"r" ((uint16_t)address) \ |
"r" ((uint16_t)address) \ |
302 |
: "r30", "r31" \ |
: "r30", "r31" \ |
303 |
); \ |
); \ |
312 |
"spm\n\t" \ |
"spm\n\t" \ |
313 |
".word 0xffff\n\t" \ |
".word 0xffff\n\t" \ |
314 |
"nop\n\t" \ |
"nop\n\t" \ |
315 |
: "=m" (__SPM_REG) \ |
: \ |
316 |
: "r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
317 |
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
318 |
"r" ((uint16_t)address) \ |
"r" ((uint16_t)address) \ |
319 |
: "r30", "r31" \ |
: "r30", "r31" \ |
320 |
); \ |
); \ |
328 |
"sts %1, %C3\n\t" \ |
"sts %1, %C3\n\t" \ |
329 |
"sts %0, %2\n\t" \ |
"sts %0, %2\n\t" \ |
330 |
"spm\n\t" \ |
"spm\n\t" \ |
331 |
: "=m" (__SPM_REG), \ |
: \ |
332 |
"=m" (RAMPZ) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
333 |
: "r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
"i" (_SFR_MEM_ADDR(RAMPZ)), \ |
334 |
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \ |
335 |
"r" ((uint32_t)address) \ |
"r" ((uint32_t)address) \ |
336 |
: "r30", "r31" \ |
: "r30", "r31" \ |
337 |
); \ |
); \ |
343 |
( \ |
( \ |
344 |
"sts %0, %1\n\t" \ |
"sts %0, %1\n\t" \ |
345 |
"spm\n\t" \ |
"spm\n\t" \ |
346 |
: "=m" (__SPM_REG) \ |
: \ |
347 |
: "r" ((uint8_t)__BOOT_RWW_ENABLE) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
348 |
|
"r" ((uint8_t)__BOOT_RWW_ENABLE) \ |
349 |
); \ |
); \ |
350 |
}) |
}) |
351 |
|
|
357 |
"spm\n\t" \ |
"spm\n\t" \ |
358 |
".word 0xffff\n\t" \ |
".word 0xffff\n\t" \ |
359 |
"nop\n\t" \ |
"nop\n\t" \ |
360 |
: "=m" (__SPM_REG) \ |
: \ |
361 |
: "r" ((uint8_t)__BOOT_RWW_ENABLE) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
362 |
|
"r" ((uint8_t)__BOOT_RWW_ENABLE) \ |
363 |
); \ |
); \ |
364 |
}) |
}) |
365 |
|
|
390 |
"mov r0, %2\n\t" \ |
"mov r0, %2\n\t" \ |
391 |
"sts %0, %1\n\t" \ |
"sts %0, %1\n\t" \ |
392 |
"spm\n\t" \ |
"spm\n\t" \ |
393 |
: "=m" (__SPM_REG) \ |
: \ |
394 |
: "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
395 |
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
396 |
"r" (value) \ |
"r" (value) \ |
397 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
398 |
); \ |
); \ |
410 |
"spm\n\t" \ |
"spm\n\t" \ |
411 |
".word 0xffff\n\t" \ |
".word 0xffff\n\t" \ |
412 |
"nop\n\t" \ |
"nop\n\t" \ |
413 |
: "=m" (__SPM_REG) \ |
: \ |
414 |
: "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
415 |
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
416 |
"r" (value) \ |
"r" (value) \ |
417 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
418 |
); \ |
); \ |
477 |
( \ |
( \ |
478 |
"ldi r30, %3\n\t" \ |
"ldi r30, %3\n\t" \ |
479 |
"ldi r31, 0\n\t" \ |
"ldi r31, 0\n\t" \ |
480 |
"sts %0, %2\n\t" \ |
"sts %1, %2\n\t" \ |
481 |
"lpm %1, Z\n\t" \ |
"lpm %0, Z\n\t" \ |
482 |
: "=m" (__SPM_REG), \ |
: "=r" (__result) \ |
483 |
"=r" (__result) \ |
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \ |
484 |
: "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ |
485 |
"M" (address) \ |
"M" (address) \ |
486 |
: "r0", "r30", "r31" \ |
: "r0", "r30", "r31" \ |
487 |
); \ |
); \ |